platforms: Add new 1bitsquared_icebreaker_bitsy platform
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut
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4c758dc0e3
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#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2020 Piotr Esden-Tempski <piotr@esden.net>
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# Copyright (c) 2021 Sylvain Munaut <tnt@246tNt.com>
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# SPDX-License-Identifier: BSD-2-Clause
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# iCEBreaker Bitsy FPGA:
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# - 1BitSquared Store: https://1bitsquared.com/collections/fpga/products/icebreaker-bitsy
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# - Design files: https://github.com/icebreaker-fpga/icebreaker
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from litex.build.dfu import DFUProg
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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# IOs ----------------------------------------------------------------------------------------------
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_io_v0 = [
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# Clk / Rst
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("clk12", 0, Pins("35"), IOStandard("LVCMOS33")),
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# Leds
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("user_led_n", 0, Pins("11"), IOStandard("LVCMOS33")),
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("user_led_n", 1, Pins("37"), IOStandard("LVCMOS33")),
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("user_ledr_n", 0, Pins("11"), IOStandard("LVCMOS33")), # Color-specific alias
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("user_ledg_n", 0, Pins("37"), IOStandard("LVCMOS33")), # Color-specific alias
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# Button
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("user_btn_n", 0, Pins("10"), IOStandard("LVCMOS33")),
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# USB
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("usb", 0,
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Subsignal("d_p", Pins("43")),
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Subsignal("d_n", Pins("42")),
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Subsignal("pullup", Pins("38")),
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IOStandard("LVCMOS33")
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),
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# Serial
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("serial", 0,
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Subsignal("rx", Pins("18")),
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Subsignal("tx", Pins("19"), Misc("PULLUP")),
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IOStandard("LVCMOS33")
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),
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# SPIFlash
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("spiflash", 0,
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Subsignal("cs_n", Pins("16"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("15"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("17"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("14"), IOStandard("LVCMOS33")),
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Subsignal("wp", Pins("12"), IOStandard("LVCMOS33")),
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Subsignal("hold", Pins("13"), IOStandard("LVCMOS33")),
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),
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("spiflash4x", 0,
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Subsignal("cs_n", Pins("16"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("15"), IOStandard("LVCMOS33")),
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Subsignal("dq", Pins("14 17 12 13"), IOStandard("LVCMOS33")),
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),
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]
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_io_v1 = [
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# Clk / Rst
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("clk12", 0, Pins("35"), IOStandard("LVCMOS33")),
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# Leds
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("user_led_n", 0, Pins("25"), IOStandard("LVCMOS33")),
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("user_led_n", 1, Pins( "6"), IOStandard("LVCMOS33")),
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("user_ledr_n", 0, Pins("25"), IOStandard("LVCMOS33")), # Color-specific alias
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("user_ledg_n", 0, Pins( "6"), IOStandard("LVCMOS33")), # Color-specific alias
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# Button
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("user_btn_n", 0, Pins( "2"), IOStandard("LVCMOS33")),
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# USB
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("usb", 0,
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Subsignal("d_p", Pins("42")),
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Subsignal("d_n", Pins("38")),
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Subsignal("pullup", Pins("37")),
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IOStandard("LVCMOS33")
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),
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# Serial
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("serial", 0,
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Subsignal("rx", Pins("47")),
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Subsignal("tx", Pins("44"), Misc("PULLUP")),
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IOStandard("LVCMOS33")
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),
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# SPIFlash
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("spiflash", 0,
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Subsignal("cs_n", Pins("16"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("15"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("17"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("14"), IOStandard("LVCMOS33")),
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Subsignal("wp", Pins("18"), IOStandard("LVCMOS33")),
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Subsignal("hold", Pins("19"), IOStandard("LVCMOS33")),
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),
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("spiflash4x", 0,
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Subsignal("cs_n", Pins("16"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("15"), IOStandard("LVCMOS33")),
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Subsignal("dq", Pins("14 17 18 19"), IOStandard("LVCMOS33")),
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors_v0 = [
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]
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_connectors_v1 = [
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("PIN", "47 44 48 45 4 3 9 10 11 12 21 13 20 25 23 27 26 28 31 32 34 36 43 46"),
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("PMOD1", "47 48 4 9 44 45 3 10"),
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("PMOD2", "43 32 26 28 36 31 27 34"),
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("PMOD3", "23 12 13 11 25 21 20 46")
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticePlatform):
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default_clk_name = "clk12"
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default_clk_period = 1e9/12e6
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def __init__(self, revision="v1", toolchain="icestorm"):
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assert revision in ["v0", "v1"]
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io, connectors = {
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"v0": (_io_v0, _connectors_v0),
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"v1": (_io_v1, _connectors_v1),
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}[revision]
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LatticePlatform.__init__(self, "ice40-up5k-sg48", io, connectors, toolchain=toolchain)
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def create_programmer(self):
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return DFUProg(vid="1d50", pid="6146")
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def do_finalize(self, fragment):
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LatticePlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk12", loose=True), 1e9/12e6)
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