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targets: Update to VideoHDMIPHY.
This commit is contained in:
parent
7161ad18ec
commit
30756ce05e
4 changed files with 8 additions and 8 deletions
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@ -21,7 +21,7 @@ from litex.build.lattice.trellis import trellis_args, trellis_argdict
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from litex.soc.cores.clock import *
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from litex.soc.cores.clock import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.builder import *
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from litex.soc.integration.builder import *
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from litex.soc.cores.video import VideoECP5HDMIPHY
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from litex.soc.cores.video import VideoHDMIPHY
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from litex.soc.cores.led import LedChaser
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from litex.soc.cores.led import LedChaser
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from litex.soc.interconnect.csr import *
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from litex.soc.interconnect.csr import *
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@ -164,7 +164,7 @@ class BaseSoC(SoCCore):
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# Video ------------------------------------------------------------------------------------
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# Video ------------------------------------------------------------------------------------
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if with_video_terminal or with_video_framebuffer:
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if with_video_terminal or with_video_framebuffer:
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self.submodules.videophy = VideoECP5HDMIPHY(platform.request("gpdi"), clock_domain="hdmi")
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self.submodules.videophy = VideoHDMIPHY(platform.request("gpdi"), clock_domain="hdmi")
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if with_video_terminal:
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if with_video_terminal:
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self.add_video_terminal(phy=self.videophy, timings="800x600@60Hz", clock_domain="hdmi")
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self.add_video_terminal(phy=self.videophy, timings="800x600@60Hz", clock_domain="hdmi")
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if with_video_framebuffer:
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if with_video_framebuffer:
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@ -19,7 +19,7 @@ from litex.build.lattice.trellis import trellis_args, trellis_argdict
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from litex.soc.cores.clock import *
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from litex.soc.cores.clock import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.builder import *
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from litex.soc.integration.builder import *
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from litex.soc.cores.video import VideoECP5HDMIPHY
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from litex.soc.cores.video import VideoHDMIPHY
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from liteeth.phy.ecp5rgmii import LiteEthPHYRGMII
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from liteeth.phy.ecp5rgmii import LiteEthPHYRGMII
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@ -92,7 +92,7 @@ class BaseSoC(SoCCore):
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# Video ------------------------------------------------------------------------------------
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# Video ------------------------------------------------------------------------------------
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if with_video_terminal:
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if with_video_terminal:
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self.submodules.videophy = VideoECP5HDMIPHY(platform.request("hdmi"), clock_domain="hdmi", pn_swap=["g", "b"])
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self.submodules.videophy = VideoHDMIPHY(platform.request("hdmi"), clock_domain="hdmi", pn_swap=["g", "b"])
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self.add_video_terminal(phy=self.videophy, timings="640x480@75Hz", clock_domain="hdmi")
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self.add_video_terminal(phy=self.videophy, timings="640x480@75Hz", clock_domain="hdmi")
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# Build --------------------------------------------------------------------------------------------
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# Build --------------------------------------------------------------------------------------------
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@ -21,7 +21,7 @@ from litex.build.lattice.trellis import trellis_args, trellis_argdict
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from litex.soc.cores.clock import *
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from litex.soc.cores.clock import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.builder import *
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from litex.soc.integration.builder import *
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from litex.soc.cores.video import VideoECP5HDMIPHY
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from litex.soc.cores.video import VideoHDMIPHY
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from litex.soc.cores.led import LedChaser
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from litex.soc.cores.led import LedChaser
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from litex.soc.interconnect.csr import *
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from litex.soc.interconnect.csr import *
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@ -124,7 +124,7 @@ class BaseSoC(SoCCore):
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# Video ------------------------------------------------------------------------------------
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# Video ------------------------------------------------------------------------------------
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if with_video_terminal or with_video_framebuffer:
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if with_video_terminal or with_video_framebuffer:
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self.submodules.videophy = VideoECP5HDMIPHY(platform.request("gpdi"), clock_domain="hdmi")
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self.submodules.videophy = VideoHDMIPHY(platform.request("gpdi"), clock_domain="hdmi")
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if with_video_terminal:
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if with_video_terminal:
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self.add_video_terminal(phy=self.videophy, timings="800x600@60Hz", clock_domain="hdmi")
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self.add_video_terminal(phy=self.videophy, timings="800x600@60Hz", clock_domain="hdmi")
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if with_video_framebuffer:
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if with_video_framebuffer:
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@ -23,7 +23,7 @@ from litex.build.lattice.trellis import trellis_args, trellis_argdict
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from litex.soc.cores.clock import *
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from litex.soc.cores.clock import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.builder import *
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from litex.soc.integration.builder import *
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from litex.soc.cores.video import VideoECP5HDMIPHY
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from litex.soc.cores.video import VideoHDMIPHY
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from litex.soc.cores.led import LedChaser
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from litex.soc.cores.led import LedChaser
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from litex.soc.cores.spi import SPIMaster
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from litex.soc.cores.spi import SPIMaster
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from litex.soc.cores.gpio import GPIOOut
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from litex.soc.cores.gpio import GPIOOut
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@ -121,7 +121,7 @@ class BaseSoC(SoCCore):
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# Video ------------------------------------------------------------------------------------
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# Video ------------------------------------------------------------------------------------
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if with_video_terminal or with_video_framebuffer:
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if with_video_terminal or with_video_framebuffer:
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self.submodules.videophy = VideoECP5HDMIPHY(platform.request("gpdi"), clock_domain="hdmi")
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self.submodules.videophy = VideoHDMIPHY(platform.request("gpdi"), clock_domain="hdmi")
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if with_video_terminal:
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if with_video_terminal:
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self.add_video_terminal(phy=self.videophy, timings="640x480@75Hz", clock_domain="hdmi")
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self.add_video_terminal(phy=self.videophy, timings="640x480@75Hz", clock_domain="hdmi")
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if with_video_framebuffer:
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if with_video_framebuffer:
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