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efinix_xyloni_dev_kit: Only force variant to minimal for Vexriscv.

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This commit is contained in:
Florent Kermarrec 2021-10-22 14:47:12 +02:00
parent 75fd276dbe
commit 394ea23b99
1 changed files with 2 additions and 1 deletions
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litex_boards/targets/efinix_xyloni_dev_kit.py
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@ -56,7 +56,8 @@ class BaseSoC(SoCCore):
kwargs["integrated_rom_size"] = 0
# Set CPU variant / reset address
kwargs["cpu_variant"] = "minimal"
if kwargs.get("cpu_type", "vexriscv") == "vexriscv":
kwargs["cpu_variant"] = "minimal"
kwargs["cpu_reset_address"] = self.mem_map["spiflash"] + bios_flash_offset
# SoCCore ----------------------------------------------------------------------------------