ti60_f225_dev_kit: Remove Ethernet/Etherbone debug that is no longer useful.
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@ -13,8 +13,6 @@ from litex.gen import *
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from litex_boards.platforms import efinix_titanium_ti60_f225_dev_kit
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from litex_boards.platforms import efinix_titanium_ti60_f225_dev_kit
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from litex.build.generic_platform import *
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from litex.soc.cores.clock import *
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from litex.soc.cores.clock import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.builder import *
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from litex.soc.integration.builder import *
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@ -91,23 +89,6 @@ class BaseSoC(SoCCore):
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if with_etherbone:
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if with_etherbone:
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self.add_etherbone(phy=self.ethphy)
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self.add_etherbone(phy=self.ethphy)
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# Extension board on P2 + External Logic Analyzer.
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_pmod_ios = [
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("debug", 0, Pins(
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"L11", # GPIOR_P_15
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"K11", # GPIOR_N_15
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"N10", # GPIOR_P_12
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"M10", # GPIOR_N_12
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),
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IOStandard("1.8_V_LVCMOS")
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),
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]
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platform.add_extension(_pmod_ios)
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debug = platform.request("debug")
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self.comb += debug[0].eq(self.ethphy.tx.sink.valid)
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self.comb += debug[1].eq(self.ethphy.tx.sink.data[0])
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self.comb += debug[2].eq(self.ethphy.tx.sink.data[1])
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# Build --------------------------------------------------------------------------------------------
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# Build --------------------------------------------------------------------------------------------
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def main():
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def main():
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