platforms/nexys_video: add specific openocd cfg (use channel 1).
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@ -241,7 +241,7 @@ class Platform(XilinxPlatform):
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self.add_platform_command("set_property INTERNAL_VREF 0.750 [get_iobanks 35]")
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def create_programmer(self):
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return OpenOCD("openocd_xc7_ft2232.cfg", "bscan_spi_xc7a200t.bit")
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return OpenOCD("openocd_nexys_video.cfg", "bscan_spi_xc7a200t.bit")
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def do_finalize(self, fragment):
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XilinxPlatform.do_finalize(self, fragment)
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@ -0,0 +1,14 @@
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interface ftdi
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ftdi_vid_pid 0x0403 0x6010
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ftdi_channel 1
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ftdi_layout_init 0x00e8 0x60eb
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reset_config none
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source [find cpld/xilinx-xc7.cfg]
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source [find cpld/jtagspi.cfg]
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adapter_khz 25000
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proc fpga_program {} {
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global _CHIPNAME
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xc7_program $_CHIPNAME.tap
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}
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