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Merge pull request #19 from lolsborn/ulx3s-target

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add sys clock freq flag, uses same method as current versa code
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enjoy-digital 2019-10-13 10:32:43 +02:00 committed by GitHub
commit 53d5ed1226
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1 changed files with 6 additions and 3 deletions
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9
litex_boards/partner/targets/ulx3s.py
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@ -53,9 +53,8 @@ class _CRG(Module):
# BaseSoC ------------------------------------------------------------------------------------------ # BaseSoC ------------------------------------------------------------------------------------------
class BaseSoC(SoCSDRAM): class BaseSoC(SoCSDRAM):
def __init__(self, device="LFE5U-45F", toolchain="diamond", **kwargs): def __init__(self, device="LFE5U-45F", toolchain="diamond", sys_clk_freq=int(50e6), **kwargs):
platform = ulx3s.Platform(device=device, toolchain=toolchain) platform = ulx3s.Platform(device=device, toolchain=toolchain)
sys_clk_freq = int(50e6)
SoCSDRAM.__init__(self, platform, clk_freq=sys_clk_freq, SoCSDRAM.__init__(self, platform, clk_freq=sys_clk_freq,
integrated_rom_size=0x8000, integrated_rom_size=0x8000,
**kwargs) **kwargs)
@ -77,11 +76,15 @@ def main():
help='gateware toolchain to use, diamond (default) or trellis') help='gateware toolchain to use, diamond (default) or trellis')
parser.add_argument("--device", dest="device", default="LFE5U-45F", parser.add_argument("--device", dest="device", default="LFE5U-45F",
help='FPGA device, ULX3S can be populated with LFE5U-45F (default) or LFE5U-85F') help='FPGA device, ULX3S can be populated with LFE5U-45F (default) or LFE5U-85F')
parser.add_argument("--sys-clk-freq", default=50e6,
help="system clock frequency (default=50MHz)")
builder_args(parser) builder_args(parser)
soc_sdram_args(parser) soc_sdram_args(parser)
args = parser.parse_args() args = parser.parse_args()
soc = BaseSoC(device=args.device, toolchain=args.toolchain, **soc_sdram_argdict(args)) soc = BaseSoC(device=args.device, toolchain=args.toolchain,
sys_clk_freq=int(float(args.sys_clk_freq)),
**soc_sdram_argdict(args))
builder = Builder(soc, **builder_argdict(args)) builder = Builder(soc, **builder_argdict(args))
builder.build() builder.build()