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targets/Ultrascale(+): enable USDDRPHY_DEBUG.

This commit is contained in:
Florent Kermarrec 2020-03-26 09:16:33 +01:00
parent 4053c02d7e
commit 555bf6c4dc
4 changed files with 4 additions and 0 deletions
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1
litex_boards/targets/kcu105.py
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@ -68,6 +68,7 @@ class BaseSoC(SoCCore):
cmd_latency = 0) cmd_latency = 0)
self.add_csr("ddrphy") self.add_csr("ddrphy")
self.add_constant("USDDRPHY", None) self.add_constant("USDDRPHY", None)
self.add_constant("USDDRPHY_DEBUG", None)
self.add_sdram("sdram", self.add_sdram("sdram",
phy = self.ddrphy, phy = self.ddrphy,
module = EDY4016A(sys_clk_freq, "1:4"), module = EDY4016A(sys_clk_freq, "1:4"),

1
litex_boards/targets/mercury_xu5.py
View File

@ -67,6 +67,7 @@ class BaseSoC(SoCCore):
cmd_latency = 0) cmd_latency = 0)
self.add_csr("ddrphy") self.add_csr("ddrphy")
self.add_constant("USDDRPHY", None) self.add_constant("USDDRPHY", None)
self.add_constant("USDDRPHY_DEBUG", None)
self.add_sdram("sdram", self.add_sdram("sdram",
phy = self.ddrphy, phy = self.ddrphy,
module = MT40A256M16(sys_clk_freq, "1:4"), module = MT40A256M16(sys_clk_freq, "1:4"),

1
litex_boards/targets/vcu118.py
View File

@ -67,6 +67,7 @@ class BaseSoC(SoCCore):
cmd_latency = 0) cmd_latency = 0)
self.add_csr("ddrphy") self.add_csr("ddrphy")
self.add_constant("USDDRPHY", None) self.add_constant("USDDRPHY", None)
self.add_constant("USDDRPHY_DEBUG", None)
self.add_sdram("sdram", self.add_sdram("sdram",
phy = self.ddrphy, phy = self.ddrphy,
module = EDY4016A(sys_clk_freq, "1:4"), module = EDY4016A(sys_clk_freq, "1:4"),

1
litex_boards/targets/zcu104.py
View File

@ -66,6 +66,7 @@ class BaseSoC(SoCCore):
cmd_latency = 1) cmd_latency = 1)
self.add_csr("ddrphy") self.add_csr("ddrphy")
self.add_constant("USDDRPHY", None) self.add_constant("USDDRPHY", None)
self.add_constant("USDDRPHY_DEBUG", None)
self.add_sdram("sdram", self.add_sdram("sdram",
phy = self.ddrphy, phy = self.ddrphy,
module = KVR21SE15S84(sys_clk_freq, "1:4"), module = KVR21SE15S84(sys_clk_freq, "1:4"),