Merge pull request #591 from VOGL-electronic/efinix_trion_t20_pulse_reset
targets: efinix_trion_t20_bga256_dev_kit: add pulse for reset
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commit
5813df9b44
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@ -23,6 +23,8 @@ from litex.soc.integration.soc_core import *
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from litex.soc.integration.builder import *
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from litex.soc.cores.led import LedChaser
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from litex.gen.genlib.misc import WaitTimer
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from litedram.modules import NDS36PT5
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from litedram.phy import GENSDRPHY
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@ -40,9 +42,15 @@ class _CRG(LiteXModule):
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clk50 = platform.request("clk50")
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rst_n = platform.request("user_btn", 0)
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# A pulse is necessary to do a reset.
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self.rst_pulse = Signal()
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reset_timer = WaitTimer(25e-6*sys_clk_freq)
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self.comb += self.rst_pulse.eq(self.rst ^ reset_timer.done)
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self.comb += reset_timer.wait.eq(self.rst)
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# PLL.
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self.pll = pll = TRIONPLL(platform)
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self.comb += pll.reset.eq(~rst_n | self.rst)
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self.comb += pll.reset.eq(~rst_n | self.rst_pulse)
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pll.register_clkin(clk50, 50e6)
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pll.create_clkout(self.cd_sys, sys_clk_freq, with_reset=True)
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pll.create_clkout(self.cd_sys_ps, sys_clk_freq, phase=180, name="sdram_clk")
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