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Fix seven_seg pin assignment in DE1-SoC 

Fixes quartus build error:
```
Error (171016): Can't place node "seven_seg5[6]" -- illegal location assignment PIN_AA2 File: /home/arusekk/src/fpga-proj/build/de1soc/gateware/de1soc.v Line: 49
```
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Arusekk 2022-02-08 09:03:53 +01:00 committed by GitHub
parent 18e8bec9d4
commit 5d52bc5461
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1 changed files with 1 additions and 1 deletions
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litex_boards/platforms/terasic_de1soc.py
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@ -35,7 +35,7 @@ _io = [
("seven_seg", 2, Pins("AB23 AE29 AD29 AC28 AD30 AC29 AC30"), IOStandard("3.3-V LVTTL")),
("seven_seg", 3, Pins("AD26 AC27 AD25 AC25 AB28 AB25 AB22"), IOStandard("3.3-V LVTTL")),
("seven_seg", 4, Pins("AA24 Y23 Y24 W22 W24 V23 W25"), IOStandard("3.3-V LVTTL")),
("seven_seg", 5, Pins("V25 AA28 Y27 AB27 AB26 AA26 AA2"), IOStandard("3.3-V LVTTL")),
("seven_seg", 5, Pins("V25 AA28 Y27 AB27 AB26 AA26 AA25"), IOStandard("3.3-V LVTTL")),
# Button
("key", 0, Pins("AA14"), IOStandard("3.3-V LVTTL")),