tinyfpga_bx: Switch to LiteSPI.
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@ -47,7 +47,9 @@ class BaseSoC(SoCCore):
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self.submodules.crg = CRG(platform.request("clk16"))
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self.submodules.crg = CRG(platform.request("clk16"))
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# SPI Flash --------------------------------------------------------------------------------
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# SPI Flash --------------------------------------------------------------------------------
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self.add_spi_flash(mode="1x", dummy_cycles=8)
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from litespi.modules import AT25SF081
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from litespi.opcodes import SpiNorFlashOpCodes as Codes
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self.add_spi_flash(mode="1x", module=AT25SF081(Codes.READ_1_1_1), with_master=False)
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# Add ROM linker region --------------------------------------------------------------------
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# Add ROM linker region --------------------------------------------------------------------
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self.bus.add_region("rom", SoCRegion(
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self.bus.add_region("rom", SoCRegion(
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