tang nano 4k: add memory regions, set default cpu
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e35b9b439f
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@ -93,6 +93,15 @@ class BaseSoC(SoCCore):
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if self.cpu_type == "gowin_emcu":
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if self.cpu_type == "gowin_emcu":
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self.cpu.connect_uart(platform.request("serial"))
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self.cpu.connect_uart(platform.request("serial"))
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self.bus.add_region("sram", SoCRegion(
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origin=self.cpu.mem_map["sram"],
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size=16 * 1024)
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)
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self.bus.add_region("rom", SoCRegion(
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origin=self.cpu.mem_map["rom"],
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size=32 * 1024,
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linker=True)
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)
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else:
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else:
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# Add ROM linker region --------------------------------------------------------------------
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# Add ROM linker region --------------------------------------------------------------------
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self.bus.add_region("rom", SoCRegion(
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self.bus.add_region("rom", SoCRegion(
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@ -140,12 +149,9 @@ def main():
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parser.add_argument("--sys-clk-freq",default=27e6, help="System clock frequency.")
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parser.add_argument("--sys-clk-freq",default=27e6, help="System clock frequency.")
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builder_args(parser)
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builder_args(parser)
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soc_core_args(parser)
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soc_core_args(parser)
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parser.set_defaults(cpu_type="gowin_emcu")
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args = parser.parse_args()
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args = parser.parse_args()
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if args.cpu_type == 'gowin_emcu':
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# FIXME: ARM software not supported yet
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args.no_compile_software = True
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soc = BaseSoC(
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soc = BaseSoC(
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sys_clk_freq=int(float(args.sys_clk_freq)),
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sys_clk_freq=int(float(args.sys_clk_freq)),
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**soc_core_argdict(args)
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**soc_core_argdict(args)
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@ -163,5 +169,6 @@ def main():
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prog.flash(0, os.path.join(builder.gateware_dir, "impl", "pnr", "project.fs"))
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prog.flash(0, os.path.join(builder.gateware_dir, "impl", "pnr", "project.fs"))
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prog.flash(0, "build/sipeed_tang_nano_4k/software/bios/bios.bin", external=True)
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prog.flash(0, "build/sipeed_tang_nano_4k/software/bios/bios.bin", external=True)
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if __name__ == "__main__":
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if __name__ == "__main__":
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main()
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main()
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