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icebreaker: Lower VideoTerminal resolution to use default 24MHz sys_clk.

This commit is contained in:
Florent Kermarrec 2021-03-04 18:29:21 +01:00
parent 253d8129af
commit 71652e8d44
1 changed files with 1 additions and 5 deletions
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6
litex_boards/targets/icebreaker.py
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@ -78,10 +78,6 @@ class BaseSoC(SoCCore):
kwargs["integrated_sram_size"] = 0 kwargs["integrated_sram_size"] = 0
kwargs["integrated_rom_size"] = 0 kwargs["integrated_rom_size"] = 0
# Force sys_clk_freq with Video Terminal since iCE40's PLL only has 1 output.
if with_video_terminal:
sys_clk_freq = 40e6
# Set CPU variant / reset address # Set CPU variant / reset address
kwargs["cpu_reset_address"] = self.mem_map["spiflash"] + bios_flash_offset kwargs["cpu_reset_address"] = self.mem_map["spiflash"] + bios_flash_offset
@ -112,7 +108,7 @@ class BaseSoC(SoCCore):
if with_video_terminal: if with_video_terminal:
platform.add_extension(icebreaker.dvi_pmod) platform.add_extension(icebreaker.dvi_pmod)
self.submodules.videophy = VideoDVIPHY(platform.request("dvi"), clock_domain="sys") self.submodules.videophy = VideoDVIPHY(platform.request("dvi"), clock_domain="sys")
self.add_video_terminal(phy=self.videophy, timings="800x600@60Hz", clock_domain="sys") self.add_video_terminal(phy=self.videophy, timings="640x480@75Hz", clock_domain="sys")
# Leds ------------------------------------------------------------------------------------- # Leds -------------------------------------------------------------------------------------
self.submodules.leds = LedChaser( self.submodules.leds = LedChaser(