Hardware
/
litex-boards
mirror of https://github.com/litex-hub/litex-boards.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

targets/colorlight_i5: Remove l2-size args (already provided by soc_core_args.

This commit is contained in:
Florent Kermarrec 2021-03-25 14:44:52 +01:00
parent 5253a3c43e
commit 7633eae360
1 changed files with 0 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
litex_boards/targets/colorlight_i5.py
View File

@ -209,7 +209,6 @@ def main():
parser.add_argument("--eth-phy", default=0, type=int, help="Ethernet PHY: 0 (default) or 1")
parser.add_argument("--use-internal-osc", action="store_true", help="Use internal oscillator")
parser.add_argument("--sdram-rate", default="1:1", help="SDRAM Rate: 1:1 Full Rate (default), 1:2 Half Rate")
parser.add_argument("--l2-size", default=8192, type=int, help="L2 cache size")
parser.add_argument("--with-prbs", action="store_true", help="Enable PRBS support")
viopts = parser.add_mutually_exclusive_group()
viopts.add_argument("--with-video-terminal", action="store_true", help="Enable Video Terminal (HDMI)")