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vc707/vcu118: use proper copyrights

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This commit is contained in:
Florent Kermarrec 2020-02-25 09:03:52 +01:00
parent e34654fc8c
commit 88a1f80db1
4 changed files with 9 additions and 11 deletions
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10
litex_boards/platforms/vc707.py
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@ -1,5 +1,5 @@
# This file is Copyright (c) 2019 Michael Betz <michibetz@gmail.com> # This file is Copyright (c) 2020 Fei Gao <feig@princeton.edu>
# (Semi-)auto-generated by `python3 gen_vc707.py VC707_rev_2.0.ucf.xdc` # License: BSD
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.xilinx import XilinxPlatform, VivadoProgrammer, XC3SProg from litex.build.xilinx import XilinxPlatform, VivadoProgrammer, XC3SProg
@ -164,9 +164,9 @@ _io = [
Subsignal("cs_n", Pins("J17"), IOStandard("SSTL15")), Subsignal("cs_n", Pins("J17"), IOStandard("SSTL15")),
Subsignal("dm", Pins("M13 K15 F12 A14"), IOStandard("SSTL15")), Subsignal("dm", Pins("M13 K15 F12 A14"), IOStandard("SSTL15")),
Subsignal("dq", Pins( Subsignal("dq", Pins(
"N14 N13 L14 M14 M12 N15 M11 L12", "N14 N13 L14 M14 M12 N15 M11 L12",
"K14 K13 H13 J13 L16 L15 H14 J15", "K14 K13 H13 J13 L16 L15 H14 J15",
"E15 E13 F15 E14 G13 G12 F14 G14", "E15 E13 F15 E14 G13 G12 F14 G14",
"B14 C13 B16 D15 D13 E12 C16 D16"), IOStandard("SSTL15_T_DCI")), "B14 C13 B16 D15 D13 E12 C16 D16"), IOStandard("SSTL15_T_DCI")),
Subsignal("dqs_p", Pins("N16 K12 H16 C15"), IOStandard("DIFF_SSTL15")), Subsignal("dqs_p", Pins("N16 K12 H16 C15"), IOStandard("DIFF_SSTL15")),
Subsignal("dqs_n", Pins("M16 J12 G16 C14"), IOStandard("DIFF_SSTL15")), Subsignal("dqs_n", Pins("M16 J12 G16 C14"), IOStandard("DIFF_SSTL15")),

4
litex_boards/platforms/vcu118.py
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@ -1,5 +1,5 @@
# This file is Copyright (c) 2019 Michael Betz <michibetz@gmail.com> # This file is Copyright (c) 2020 Fei Gao <feig@princeton.edu>
# (Semi-)auto-generated by `python3 gen_vcu118.py vcu118_rev2.0_12082017.xdc` # License: BSD
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.xilinx import XilinxPlatform, VivadoProgrammer from litex.build.xilinx import XilinxPlatform, VivadoProgrammer

4
litex_boards/targets/vc707.py
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@ -1,8 +1,6 @@
#!/usr/bin/env python3 #!/usr/bin/env python3
# This file is Copyright (c) 2014-2015 Sebastien Bourdeauducq <sb@m-labs.hk> # This file is Copyright (c) 2020 Fei Gao <feig@princeton.edu>
# This file is Copyright (c) 2014-2019 Florent Kermarrec <florent@enjoy-digital.fr>
# This file is Copyright (c) 2014-2015 Yann Sionneau <ys@m-labs.hk>
# License: BSD # License: BSD
import argparse import argparse

2
litex_boards/targets/vcu118.py
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@ -1,6 +1,6 @@
#!/usr/bin/env python3 #!/usr/bin/env python3
# This file is Copyright (c) 2018-2019 Florent Kermarrec <florent@enjoy-digital.fr> # This file is Copyright (c) 2020 Fei Gao <feig@princeton.edu>
# License: BSD # License: BSD
import argparse import argparse