ocp_tap_timecard: Fix CI.
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@ -75,6 +75,7 @@ class BaseSoC(SoCCore):
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self.crg = CRG(platform, sys_clk_freq)
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self.crg = CRG(platform, sys_clk_freq)
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# SoCCore ----------------------------------------------------------------------------------
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# SoCCore ----------------------------------------------------------------------------------
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kwargs["uart_name"] = "crossover"
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SoCCore.__init__(self, platform, sys_clk_freq, ident="LiteX SoC on OCP-TAP TimeCard", **kwargs)
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SoCCore.__init__(self, platform, sys_clk_freq, ident="LiteX SoC on OCP-TAP TimeCard", **kwargs)
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# XADC -------------------------------------------------------------------------------------
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# XADC -------------------------------------------------------------------------------------
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