colorlight_5a_75b/v7.0: update eth_clocks/rx pinout, remove FIXME

2020-01-22 14:56:17 +01:00 · 2020-01-22 14:56:17 +01:00 · 8da8ed7a0e
parent bb805999cb
commit 8da8ed7a0e
1 changed files with 1 additions and 1 deletions
--- a/litex_boards/partner/platforms/colorlight_5a_75b.py
+++ b/litex_boards/partner/platforms/colorlight_5a_75b.py
@ -118,7 +118,7 @@ _io_v7_0 = [ # Documented by @miek
    # ethernet (B50612D)
    ("eth_clocks", 0,
        Subsignal("tx", Pins("M2")),
-        Subsignal("rx", Pins("P5")), # FIXME: already used for rst_n
+        Subsignal("rx", Pins("M1")),
        IOStandard("LVCMOS33")
    ),
    ("eth", 0,