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https://github.com/litex-hub/litex-boards.git
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Merge branch 'master' into jev/deca-eth
This commit is contained in:
commit
9144cb44fb
3 changed files with 65 additions and 3 deletions
22
litex_boards/prog/openocd_max10_blaster.cfg
Normal file
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litex_boards/prog/openocd_max10_blaster.cfg
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@ -0,0 +1,22 @@
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source [find interface/altera-usb-blaster.cfg]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME 10m50
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}
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# user-defined chains are 0xC (12) or 0xE (14)
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# they are the same, single, scan-chain disgtinguished by the usr1user bit
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jtag newtap $_CHIPNAME tap -irlen 10 -expected-id 0x31810dd -expected-id 0x318a0dd \
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-expected-id 0x31820dd -expected-id 0x31830dd -expected-id 0x31840dd \
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-expected-id 0x318d0dd -expected-id 0x31850dd -expected-id 0x31010dd \
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-expected-id 0x310a0dd -expected-id 0x31020dd -expected-id 0x31030dd \
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-expected-id 0x31040dd -expected-id 0x310d0dd -expected-id 0x31050dd
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# unneeded
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# suppresses warning
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gdb_port disabled
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tcl_port disabled
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telnet_port disabled
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22
litex_boards/prog/openocd_max10_blaster2.cfg
Normal file
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litex_boards/prog/openocd_max10_blaster2.cfg
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@ -0,0 +1,22 @@
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source [find interface/altera-usb-blaster2.cfg]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME 10m50
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}
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# user-defined chains are 0xC (12) or 0xE (14)
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# they are the same, single, scan-chain disgtinguished by the usr1user bit
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jtag newtap $_CHIPNAME tap -irlen 10 -expected-id 0x31810dd -expected-id 0x318a0dd \
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-expected-id 0x31820dd -expected-id 0x31830dd -expected-id 0x31840dd \
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-expected-id 0x318d0dd -expected-id 0x31850dd -expected-id 0x31010dd \
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-expected-id 0x310a0dd -expected-id 0x31020dd -expected-id 0x31030dd \
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-expected-id 0x31040dd -expected-id 0x310d0dd -expected-id 0x31050dd
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# unneeded
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# suppresses warning
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gdb_port disabled
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tcl_port disabled
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telnet_port disabled
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@ -53,15 +53,21 @@ class _CRG(Module):
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# BaseSoC ------------------------------------------------------------------------------------------
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# BaseSoC ------------------------------------------------------------------------------------------
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class BaseSoC(SoCCore):
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class BaseSoC(SoCCore):
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def __init__(self, sys_clk_freq=int(50e6), with_led_chaser=True, with_video_terminal=False,
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def __init__(self, sys_clk_freq=int(50e6), with_led_chaser=True, with_uartbone=False, with_jtagbone=False, with_video_terminal=False,
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with_ethernet=False, with_etherbone=False, eth_ip="192.168.1.50",
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with_ethernet=False, with_etherbone=False, eth_ip="192.168.1.50",
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eth_dynamic_ip=False,
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eth_dynamic_ip=False,
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**kwargs):
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**kwargs):
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self.platform = platform = deca.Platform()
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self.platform = platform = deca.Platform()
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# Defaults to JTAG-UART since no hardware UART.
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# Defaults to JTAG-UART since no hardware UART.
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if kwargs["uart_name"] == "serial":
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real_uart_name = kwargs["uart_name"]
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kwargs["uart_name"] = "jtag_atlantic"
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if real_uart_name == "serial":
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if with_jtagbone:
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kwargs["uart_name"] = "crossover"
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else:
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kwargs["uart_name"] = "jtag_atlantic"
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if with_uartbone:
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kwargs["uart_name"] = "crossover"
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# SoCCore ----------------------------------------------------------------------------------
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# SoCCore ----------------------------------------------------------------------------------
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SoCCore.__init__(self, platform, sys_clk_freq,
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SoCCore.__init__(self, platform, sys_clk_freq,
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@ -71,6 +77,14 @@ class BaseSoC(SoCCore):
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# CRG --------------------------------------------------------------------------------------
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# CRG --------------------------------------------------------------------------------------
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self.submodules.crg = self.crg = _CRG(platform, sys_clk_freq, with_usb_pll=False)
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self.submodules.crg = self.crg = _CRG(platform, sys_clk_freq, with_usb_pll=False)
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# UARTbone ---------------------------------------------------------------------------------
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if with_uartbone:
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self.add_uartbone(name=real_uart_name, baudrate=kwargs["uart_baudrate"])
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# JTAGbone ---------------------------------------------------------------------------------
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if with_jtagbone:
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self.add_jtagbone()
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# Ethernet ---------------------------------------------------------------------------------
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# Ethernet ---------------------------------------------------------------------------------
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if with_ethernet or with_etherbone:
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if with_ethernet or with_etherbone:
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self.platform.toolchain.additional_sdc_commands += [
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self.platform.toolchain.additional_sdc_commands += [
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@ -111,6 +125,8 @@ def main():
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ethopts.add_argument("--with-etherbone", action="store_true", help="Enable Etherbone support.")
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ethopts.add_argument("--with-etherbone", action="store_true", help="Enable Etherbone support.")
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parser.add_argument("--eth-ip", default="192.168.1.50", type=str, help="Ethernet/Etherbone IP address.")
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parser.add_argument("--eth-ip", default="192.168.1.50", type=str, help="Ethernet/Etherbone IP address.")
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parser.add_argument("--eth-dynamic-ip", action="store_true", help="Enable dynamic Ethernet IP addresses setting.")
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parser.add_argument("--eth-dynamic-ip", action="store_true", help="Enable dynamic Ethernet IP addresses setting.")
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parser.add_argument("--with-uartbone", action="store_true", help="Enable UARTbone support.")
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parser.add_argument("--with-jtagbone", action="store_true", help="Enable JTAGbone support.")
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parser.add_argument("--with-video-terminal", action="store_true", help="Enable Video Terminal (VGA).")
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parser.add_argument("--with-video-terminal", action="store_true", help="Enable Video Terminal (VGA).")
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builder_args(parser)
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builder_args(parser)
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soc_core_args(parser)
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soc_core_args(parser)
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@ -122,6 +138,8 @@ def main():
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with_etherbone = args.with_etherbone,
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with_etherbone = args.with_etherbone,
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eth_ip = args.eth_ip,
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eth_ip = args.eth_ip,
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eth_dynamic_ip = args.eth_dynamic_ip,
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eth_dynamic_ip = args.eth_dynamic_ip,
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with_uartbone = args.with_uartbone,
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with_jtagbone = args.with_jtagbone,
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with_video_terminal = args.with_video_terminal,
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with_video_terminal = args.with_video_terminal,
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**soc_core_argdict(args)
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**soc_core_argdict(args)
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)
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)
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