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targets/de10lite: rename VideoSoC to VGASoC (to avoid confusion with VideoSoC as used on Video designs with framebuffer)

This commit is contained in:
Florent Kermarrec 2019-12-31 17:30:23 +01:00
parent 10e5248bda
commit 980b0ebda0
1 changed files with 4 additions and 5 deletions
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9
litex_boards/community/targets/de10lite.py
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@ -102,9 +102,9 @@ class BaseSoC(SoCSDRAM):
geom_settings = sdram_module.geom_settings, geom_settings = sdram_module.geom_settings,
timing_settings = sdram_module.timing_settings) timing_settings = sdram_module.timing_settings)
# VideoSoC ------------------------------------------------------------------------------------------ # VGASoC -------------------------------------------------------------------------------------------
class VideoSoC(BaseSoC): class VGASoC(BaseSoC):
mem_map = { mem_map = {
"terminal": 0x30000000, "terminal": 0x30000000,
} }
@ -134,11 +134,10 @@ def main():
parser = argparse.ArgumentParser(description="LiteX SoC on DE10 Lite") parser = argparse.ArgumentParser(description="LiteX SoC on DE10 Lite")
builder_args(parser) builder_args(parser)
soc_sdram_args(parser) soc_sdram_args(parser)
parser.add_argument("--with-vga", action="store_true", parser.add_argument("--with-vga", action="store_true", help="enable VGA support")
help="enable VGA support")
args = parser.parse_args() args = parser.parse_args()
cls = VideoSoC if args.with_vga else BaseSoC cls = VGASoC if args.with_vga else BaseSoC
soc = cls(**soc_sdram_argdict(args)) soc = cls(**soc_sdram_argdict(args))
builder = Builder(soc, **builder_argdict(args)) builder = Builder(soc, **builder_argdict(args))
builder.build() builder.build()