Delete ulx4m_ld_v2.py
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#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2020 Greg Davill <greg.davill@gmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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#from litex.build.dfu import DFUProg
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# IOs ----------------------------------------------------------------------------------------------
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_io_r0_1 = [
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("clk25", 0, Pins("G2"), IOStandard("LVCMOS33")),
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("rst_n", 0, Pins("F1"), IOStandard("LVCMOS33")),
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("rgb_led", 0,
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Subsignal("r", Pins("A3"), IOStandard("LVCMOS33")),
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Subsignal("g", Pins("B3"), IOStandard("LVCMOS33")),
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Subsignal("b", Pins("B2"), IOStandard("LVCMOS33")),
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),
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("user_btn", 0, Pins("E1"), IOStandard("LVCMOS33")),
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("user_led", 0, Pins("A3"), IOStandard("LVCMOS33")),
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("user_led", 1, Pins("B3"), IOStandard("LVCMOS33")),
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("user_led", 2, Pins("B2"), IOStandard("LVCMOS33")),
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("user_led", 3, Pins("C3"), IOStandard("LVCMOS33")),
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("user_led", 4, Pins("C2"), IOStandard("LVCMOS33")),
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("user_led", 5, Pins("C1"), IOStandard("LVCMOS33")),
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("user_led", 6, Pins("D1"), IOStandard("LVCMOS33")),
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("user_led", 7, Pins("D3"), IOStandard("LVCMOS33")),
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("ddram", 0,
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Subsignal("a", Pins(
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"F18 L17 D19 E18 H16 T20 U17 T17",
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"E16 U19 J17 J16 P17 U20 N20 P18"),
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IOStandard("SSTL135_I")),
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Subsignal("ba", Pins("P19 G16 P20"), IOStandard("SSTL135_I")),
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Subsignal("ras_n", Pins("R20"), IOStandard("SSTL135_I")),
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Subsignal("cas_n", Pins("F20"), IOStandard("SSTL135_I")),
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Subsignal("we_n", Pins("H17"), IOStandard("SSTL135_I")),
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Subsignal("cs_n", Pins("H18"), IOStandard("SSTL135_I")),
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Subsignal("dm", Pins("F16 U16"), IOStandard("SSTL135_I")),
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Subsignal("dq", Pins(
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"R17 L19 R16 L16 M18 M19 N18 N17",
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"J19 C20 F19 E20 J18 K19 E19 G20"),
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IOStandard("SSTL135_I"),
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Misc("TERMINATION=75")), # Misc("TERMINATION=75") Disabled to reduce heat
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Subsignal("dqs_p", Pins("N16 G19"), IOStandard("SSTL135D_I"),
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Misc("TERMINATION=OFF DIFFRESISTOR=100")),
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Subsignal("clk_p", Pins("L20"), IOStandard("SSTL135D_I")),
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Subsignal("cke", Pins("N19"), IOStandard("SSTL135_I")),
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Subsignal("odt", Pins("T19"), IOStandard("SSTL135_I")),
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Subsignal("reset_n", Pins("T18"), IOStandard("SSTL135_I")),
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#Subsignal("vccio", Pins("H15 J15 H14 L15 M15 L14"), IOStandard("SSTL135_II")),
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#Subsignal("gnd", Pins("G15 K15"), IOStandard("SSTL135_II")),
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Misc("SLEWRATE=FAST")
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),
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("usb", 0,
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Subsignal("d_p", Pins("F4")),
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Subsignal("d_n", Pins("E3")),
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Subsignal("pullup", Pins("F5")),
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IOStandard("LVCMOS33")
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),
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("uart", 0,
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Subsignal("rx", Pins("N4"), Misc("PULLMODE=UP"), IOStandard("LVCMOS33")),
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Subsignal("tx", Pins("N3"), Misc("PULLMODE=NONE"), IOStandard("LVCMOS33")),
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Subsignal("tx_enable", Pins("T1"), Misc("PULLMODE=UP")),
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IOStandard("LVCMOS33")
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),
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# Serial
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("serial", 0,
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Subsignal("rx", Pins("N4"), Misc("PULLMODE=UP"), IOStandard("LVCMOS33")),
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Subsignal("tx", Pins("N3"), Misc("PULLMODE=NONE"), IOStandard("LVCMOS33")),
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Subsignal("tx_enable", Pins("T1"), Misc("PULLMODE=UP")),
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IOStandard("LVCMOS33")
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),
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# SPIFlash
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("spiflash", 0,
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Subsignal("cs_n", Pins("R2")),
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Subsignal("miso", Pins("V2")),
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Subsignal("mosi", Pins("W2")),
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Subsignal("wp", Pins("Y2")),
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Subsignal("hold", Pins("W1")),
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IOStandard("LVCMOS33")
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),
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("spiflash4x", 0,
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Subsignal("cs_n", Pins("R2")),
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Subsignal("dq", Pins("W2", "V2", "Y2", "W1")),
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IOStandard("LVCMOS33")
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),
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("sdcard", 0,
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Subsignal("clk", Pins("G1")),
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Subsignal("cmd", Pins("P1"), Misc("PULLMODE=UP")),
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Subsignal("data", Pins("B15 B18 E14 P2"), Misc("PULLMODE=UP")),
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IOStandard("LVCMOS33"), Misc("SLEW=FAST")
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),
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# GPDI
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("gpdi", 0,
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Subsignal("clk_p", Pins("J20"), IOStandard("SSTL135D_I"), Misc("DRIVE=4")),
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#Subsignal("clk_n", Pins("B18"), IOStandard("LVCMOS33D"), Misc("DRIVE=4")),
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Subsignal("data0_p", Pins("F17"), IOStandard("SSTL135D_I"), Misc("DRIVE=4")),
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#Subsignal("data0_n", Pins("A13"), IOStandard("LVCMOS33D"), Misc("DRIVE=4")),
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Subsignal("data1_p", Pins("D18"), IOStandard("SSTL135D_I"), Misc("DRIVE=4")),
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#Subsignal("data1_n", Pins("C14"), IOStandard("LVCMOS33D"), Misc("DRIVE=4")),
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Subsignal("data2_p", Pins("C18"), IOStandard("SSTL135D_I"), Misc("DRIVE=4")),
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#Subsignal("data2_n", Pins("B16"), IOStandard("LVCMOS33D"), Misc("DRIVE=4")),
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#Subsignal("cec", Pins("A18"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
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#Subsignal("scl", Pins("E19"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
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#Subsignal("sda", Pins("B19"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP"))
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors_r0_1 = [
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# Feather 0.1" Header Pin Numbers,
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# Note: Pin nubering is not continuous.
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("GPIO", "P16 P17"),
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]
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_connectors_r0_2 = [
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# Feather 0.1" Header Pin Numbers,
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# Note: Pin nubering is not continuous.
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("GPIO", "P16 P17 K5 J5 - K4 H16 - - R1 P3 P4 G16 N17 L16 C4 T1 - - - - - - - -"),
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]
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# Standard Feather Pins
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feather_serial = [
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("serial", 0,
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Subsignal("tx", Pins("GPIO:1"), IOStandard("LVCMOS33")),
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Subsignal("rx", Pins("GPIO:0"), IOStandard("LVCMOS33"))
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)
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]
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feather_i2c = [
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("i2c", 0,
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Subsignal("sda", Pins("GPIO:2"), IOStandard("LVCMOS33")),
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Subsignal("scl", Pins("GPIO:3"), IOStandard("LVCMOS33"))
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)
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]
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feather_spi = [
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("spi",0,
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Subsignal("miso", Pins("GPIO:14"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("GPIO:16"), IOStandard("LVCMOS33")),
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Subsignal("sck", Pins("GPIO:15"), IOStandard("LVCMOS33"))
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)
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticePlatform):
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default_clk_name = "clk25"
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default_clk_period = 1e9/25e6
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def __init__(self, revision="0.1", device="85F", **kwargs):
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assert revision in ["0.1"]
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self.revision = revision
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io = {"0.1": _io_r0_1}[revision]
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connectors = {"0.1": _connectors_r0_1}[revision]
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LatticePlatform.__init__(self, f"LFE5UM5G-85F-8BG381C", io, connectors, **kwargs)
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# def create_programmer(self):
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# return DFUProg(vid="1209", pid="5af0")
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def do_finalize(self, fragment):
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LatticePlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk25", loose=True), 1e9/25e6)
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