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mnt_rkx7: Add I2C (For the SiI9022A).

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This commit is contained in:
Florent Kermarrec 2021-09-30 15:33:53 +02:00
parent 4f7c18a503
commit 9bcae49629
2 changed files with 12 additions and 0 deletions
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7
litex_boards/platforms/mnt_rkx7.py
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@ -56,6 +56,13 @@ _io = [
Subsignal("tx_data", Pins("H18 H17 G19 F18"), IOStandard("LVCMOS33")),
),
# I2C
("i2c", 0,
Subsignal("scl", Pins("G12")),
Subsignal("sda", Pins("A13")),
IOStandard("LVCMOS18"),
),
# DDR3 SDRAM.
("ddram", 0,
Subsignal("a", Pins(

5
litex_boards/targets/mnt_rkx7.py
View file

@ -16,6 +16,7 @@ from litex_boards.platforms import mnt_rkx7
from litex.soc.cores.clock import *
from litex.soc.integration.soc_core import *
from litex.soc.integration.builder import *
from litex.soc.cores.bitbang import I2CMaster
from litedram.modules import MT41K512M16 # FIXME: IS43TR16512B
from litedram.phy import s7ddrphy
@ -89,6 +90,10 @@ class BaseSoC(SoCCore):
if with_etherbone:
self.add_etherbone(phy=self.ethphy)
# I2C --------------------------------------------------------------------------------------
self.submodules.i2c = I2CMaster(platform.request("i2c"))
# Build --------------------------------------------------------------------------------------------
def main():