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Merge pull request #488 from Icenowy/stlv7325-s7pll 

sitlinv_stlv7325: use S7PLL instead of S7MMCM for system clock
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enjoy-digital 2023-04-04 08:22:16 +02:00 committed by GitHub
parent e4c1d5725e b1107e94d4
commit a4925d14f9
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litex_boards/targets/sitlinv_stlv7325.py
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@ -47,7 +47,7 @@ class _CRG(LiteXModule):
rst_n = platform.request("cpu_reset_n") rst_n = platform.request("cpu_reset_n")
# PLL. # PLL.
self.pll = pll = S7MMCM(speedgrade=-2) self.pll = pll = S7PLL(speedgrade=-2)
self.comb += pll.reset.eq(~rst_n | self.rst) self.comb += pll.reset.eq(~rst_n | self.rst)
pll.register_clkin(clk200, 200e6) pll.register_clkin(clk200, 200e6)
pll.create_clkout(self.cd_sys, sys_clk_freq) pll.create_clkout(self.cd_sys, sys_clk_freq)