ecpix5: add option to select ECP5 device
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bee71da774
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@ -111,8 +111,9 @@ class Platform(LatticePlatform):
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default_clk_name = "clk100"
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default_clk_period = 1e9/100e6
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def __init__(self, toolchain="trellis", **kwargs):
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LatticePlatform.__init__(self, "LFE5UM5G-85F-8BG554I", _io, _connectors, toolchain=toolchain, **kwargs)
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def __init__(self, device="85F", toolchain="trellis", **kwargs):
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assert device in ["45F", "85F"]
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LatticePlatform.__init__(self, f"LFE5UM5G-{device}-8BG554I", _io, _connectors, toolchain=toolchain, **kwargs)
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def create_programmer(self):
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return OpenOCDJTAGProgrammer("openocd_ecpix5.cfg")
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@ -77,8 +77,8 @@ class _CRG(Module):
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# BaseSoC ------------------------------------------------------------------------------------------
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class BaseSoC(SoCCore):
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def __init__(self, sys_clk_freq=int(75e6), with_ethernet=False, **kwargs):
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platform = ecpix5.Platform(toolchain="trellis")
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def __init__(self, device="85F", sys_clk_freq=int(75e6), with_ethernet=False, **kwargs):
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platform = ecpix5.Platform(device=device, toolchain="trellis")
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# SoCCore ----------------------------------------------------------------------------------
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SoCCore.__init__(self, platform, sys_clk_freq,
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@ -128,6 +128,7 @@ def main():
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parser = argparse.ArgumentParser(description="LiteX SoC on ECPIX-5")
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parser.add_argument("--build", action="store_true", help="Build bitstream")
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parser.add_argument("--load", action="store_true", help="Load bitstream")
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parser.add_argument("--device", default="85F", help="ECP5 device (default: 85F)")
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parser.add_argument("--sys-clk-freq", default=75e6, help="System clock frequency (default: 75MHz)")
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parser.add_argument("--with-sdcard", action="store_true", help="Enable SDCard support")
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parser.add_argument("--with-ethernet", action="store_true", help="Enable Ethernet support")
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@ -137,6 +138,7 @@ def main():
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args = parser.parse_args()
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soc = BaseSoC(
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device = args.device,
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sys_clk_freq = int(float(args.sys_clk_freq)),
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with_ethernet = args.with_ethernet,
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**soc_core_argdict(args)
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