alinx_axau15: Fixed minor clock and sdcard reference issues
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@ -32,6 +32,9 @@ class _CRG(LiteXModule):
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self.cd_sys4x = ClockDomain()
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self.cd_idelay = ClockDomain()
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# Clk.
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clk200 = platform.request("sys_clk200")
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# # #
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# PLL.
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self.pll = pll = USMMCM(speedgrade=-2)
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@ -116,8 +119,7 @@ def main():
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**parser.soc_argdict
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)
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soc.platform.add_extension(alinx_axau15._sdcard_pmod_io)
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soc.add_spi_sdcard()
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soc.add_sdcard()
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builder = Builder(soc, **parser.builder_argdict)
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if args.build:
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