trenz_c10lprefkit: Add Etherbone support.
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@ -58,7 +58,9 @@ class BaseSoC(SoCCore):
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}
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mem_map.update(SoCCore.mem_map)
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def __init__(self, sys_clk_freq=int(50e6), with_ethernet=False, with_led_chaser=True, **kwargs):
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def __init__(self, sys_clk_freq=int(50e6), with_led_chaser=True,
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with_ethernet=False, with_etherbone=False,
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**kwargs):
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platform = c10lprefkit.Platform()
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# SoCCore ----------------------------------------------------------------------------------
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@ -83,12 +85,15 @@ class BaseSoC(SoCCore):
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l2_cache_size = kwargs.get("l2_size", 8192)
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)
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# Ethernet ---------------------------------------------------------------------------------
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if with_ethernet:
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# Ethernet / Etherbone ---------------------------------------------------------------------
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if with_ethernet or with_etherbone:
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self.submodules.ethphy = LiteEthPHYMII(
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clock_pads = self.platform.request("eth_clocks"),
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pads = self.platform.request("eth"))
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self.add_ethernet(phy=self.ethphy)
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if with_ethernet:
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self.add_ethernet(phy=self.ethphy)
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if with_etherbone:
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self.add_etherbone(phy=self.ethphy)
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# Leds -------------------------------------------------------------------------------------
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if with_led_chaser:
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@ -100,17 +105,19 @@ class BaseSoC(SoCCore):
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def main():
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parser = argparse.ArgumentParser(description="LiteX SoC on C10 LP RefKit")
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parser.add_argument("--build", action="store_true", help="Build bitstream.")
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parser.add_argument("--load", action="store_true", help="Load bitstream.")
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parser.add_argument("--sys-clk-freq", default=50e6, help="System clock frequency.")
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parser.add_argument("--with-ethernet", action="store_true", help="Enable Ethernet support.")
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parser.add_argument("--build", action="store_true", help="Build bitstream.")
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parser.add_argument("--load", action="store_true", help="Load bitstream.")
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parser.add_argument("--sys-clk-freq", default=50e6, help="System clock frequency.")
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parser.add_argument("--with-ethernet", action="store_true", help="Enable Ethernet support.")
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parser.add_argument("--with-etherbone", action="store_true", help="Enable Etherbone support.")
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builder_args(parser)
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soc_core_args(parser)
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args = parser.parse_args()
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soc = BaseSoC(
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sys_clk_freq = int(float(args.sys_clk_freq)),
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with_ethernet = args.with_ethernet,
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sys_clk_freq = int(float(args.sys_clk_freq)),
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with_ethernet = args.with_ethernet,
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with_etherbone = args.with_etherbone,
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**soc_core_argdict(args)
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)
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builder = Builder(soc, **builder_argdict(args))
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