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qmtech core boards: make core resources optional

This commit is contained in:
Hans Baier 2024-03-30 09:57:09 +07:00
parent 2505aeb9b4
commit af1cdc4ed9
7 changed files with 15 additions and 15 deletions
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4
litex_boards/platforms/qmtech_10cl006.py
View File

@ -130,7 +130,7 @@ class Platform(AlteraPlatform):
),
]
def __init__(self, toolchain="quartus", with_daughterboard=False):
def __init__(self, toolchain="quartus", with_daughterboard=False, with_core_resources=True):
device = "10CL006YU256C8G"
io = _io
connectors = _connectors
@ -140,7 +140,7 @@ class Platform(AlteraPlatform):
daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL"))
io += daughterboard.io
connectors += daughterboard.connectors
else:
elif with_core_resources:
io += self.core_resources
AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)

4
litex_boards/platforms/qmtech_5cefa2.py
View File

@ -129,7 +129,7 @@ class Platform(AlteraPlatform):
),
]
def __init__(self, toolchain="quartus", with_daughterboard=False):
def __init__(self, toolchain="quartus", with_daughterboard=False, with_core_resources=True):
device = "5CEFA2F23C8"
io = _io
connectors = _connectors
@ -139,7 +139,7 @@ class Platform(AlteraPlatform):
daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL"))
io += daughterboard.io
connectors += daughterboard.connectors
else:
elif with_core_resources:
io += self.core_resources
AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)

4
litex_boards/platforms/qmtech_5cefa5.py
View File

@ -132,7 +132,7 @@ class Platform(AlteraPlatform):
),
]
def __init__(self, toolchain="quartus", with_daughterboard=False):
def __init__(self, toolchain="quartus", with_daughterboard=False, with_core_resources=True):
device = "5CEFA5F23I7"
io = _io
connectors = _connectors
@ -142,7 +142,7 @@ class Platform(AlteraPlatform):
daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVCMOS"))
io += daughterboard.io
connectors += daughterboard.connectors
else:
elif with_core_resources:
io += self.core_resources
AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)

4
litex_boards/platforms/qmtech_ep4cex5.py
View File

@ -130,7 +130,7 @@ class Platform(AlteraPlatform):
),
]
def __init__(self, variant="ep4ce15", toolchain="quartus", with_daughterboard=False):
def __init__(self, variant="ep4ce15", toolchain="quartus", with_daughterboard=False, with_core_resources=True):
device = {
"ep4ce15": "EP4CE15F23C8",
"ep4ce55": "EP4CE55F23C8"
@ -143,7 +143,7 @@ class Platform(AlteraPlatform):
daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL"))
io += daughterboard.io
connectors += daughterboard.connectors
else:
elif with_core_resources:
io += self.core_resources
AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)

4
litex_boards/platforms/qmtech_ep4cgx150.py
View File

@ -131,7 +131,7 @@ class Platform(AlteraPlatform):
),
]
def __init__(self, toolchain="quartus", with_daughterboard=False):
def __init__(self, toolchain="quartus", with_daughterboard=False, with_core_resources=True):
device = "EP4CGX150DF27I7"
io = _io
connectors = _connectors
@ -141,7 +141,7 @@ class Platform(AlteraPlatform):
daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL"))
io += daughterboard.io
connectors += daughterboard.connectors
else:
elif with_core_resources:
io += self.core_resources
AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)

6
litex_boards/platforms/qmtech_xc7a35t.py
View File

@ -145,7 +145,7 @@ class Platform(Xilinx7SeriesPlatform):
("cpu_reset", 0, Pins("K5"), IOStandard("LVCMOS33")),
]
def __init__(self, toolchain="vivado", with_daughterboard=False):
def __init__(self, toolchain="vivado", with_daughterboard=False, with_core_resources=True):
device = "xc7a35tftg256-1"
io = _io
connectors = _connectors
@ -155,7 +155,7 @@ class Platform(Xilinx7SeriesPlatform):
daughterboard = QMTechDaughterboard(IOStandard("LVCMOS33"))
io += daughterboard.io
connectors += daughterboard.connectors
else:
elif with_core_resources:
io += self.core_resources
Xilinx7SeriesPlatform.__init__(self, device, io, connectors, toolchain=toolchain)
@ -177,4 +177,4 @@ class Platform(Xilinx7SeriesPlatform):
def do_finalize(self, fragment):
Xilinx7SeriesPlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6)
self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6)

4
litex_boards/platforms/qmtech_xc7k325t.py
View File

@ -151,7 +151,7 @@ class Platform(XilinxPlatform):
("user_led", 1, Pins("H26"), IOStandard("LVCMOS33")),
]
def __init__(self, toolchain="vivado", with_daughterboard=False):
def __init__(self, toolchain="vivado", with_daughterboard=False, with_core_resources=True):
device = "xc7k325tffg676-1"
io = _io
connectors = _connectors
@ -162,7 +162,7 @@ class Platform(XilinxPlatform):
daughterboard = QMTechDaughterboard(IOStandard("LVCMOS33"))
io += daughterboard.io
connectors += daughterboard.connectors
else:
elif with_core_resources:
io += self.core_resources_standalone
XilinxPlatform.__init__(self, device, io, connectors, toolchain=toolchain)