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targets: Fix SPI Flash mapping on target supporting --with-spi-flash.

This commit is contained in:
Florent Kermarrec 2021-08-23 18:05:40 +02:00
parent f1e1ae2f71
commit b017a33f2b
3 changed files with 3 additions and 0 deletions
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1
litex_boards/targets/digilent_arty.py
View File

@ -57,6 +57,7 @@ class _CRG(Module):
# BaseSoC ------------------------------------------------------------------------------------------ # BaseSoC ------------------------------------------------------------------------------------------
class BaseSoC(SoCCore): class BaseSoC(SoCCore):
mem_map = {**SoCCore.mem_map, **{"spiflash": 0x80000000}}
def __init__(self, variant="a7-35", toolchain="vivado", sys_clk_freq=int(100e6), def __init__(self, variant="a7-35", toolchain="vivado", sys_clk_freq=int(100e6),
with_ethernet=False, with_etherbone=False, eth_ip="192.168.1.50", with_ethernet=False, with_etherbone=False, eth_ip="192.168.1.50",
eth_dynamic_ip=False, ident_version=True, with_led_chaser=True, with_jtagbone=True, eth_dynamic_ip=False, ident_version=True, with_led_chaser=True, with_jtagbone=True,

1
litex_boards/targets/digilent_arty_s7.py
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@ -51,6 +51,7 @@ class _CRG(Module):
# BaseSoC ------------------------------------------------------------------------------------------ # BaseSoC ------------------------------------------------------------------------------------------
class BaseSoC(SoCCore): class BaseSoC(SoCCore):
mem_map = {**SoCCore.mem_map, **{"spiflash": 0x80000000}}
def __init__(self, variant="s7-50", sys_clk_freq=int(100e6), with_spi_flash=False, with_led_chaser=True, **kwargs): def __init__(self, variant="s7-50", sys_clk_freq=int(100e6), with_spi_flash=False, with_led_chaser=True, **kwargs):
platform = arty_s7.Platform(variant=variant) platform = arty_s7.Platform(variant=variant)

1
litex_boards/targets/qmtech_xc7a35t.py
View File

@ -69,6 +69,7 @@ class _CRG(Module):
# BaseSoC ------------------------------------------------------------------------------------------ # BaseSoC ------------------------------------------------------------------------------------------
class BaseSoC(SoCCore): class BaseSoC(SoCCore):
mem_map = {**SoCCore.mem_map, **{"spiflash": 0x80000000}}
def __init__(self, toolchain="vivado", sys_clk_freq=int(100e6), with_daughterboard=False, def __init__(self, toolchain="vivado", sys_clk_freq=int(100e6), with_daughterboard=False,
with_ethernet=False, with_etherbone=False, eth_ip="192.168.1.50", eth_dynamic_ip=False, with_ethernet=False, with_etherbone=False, eth_ip="192.168.1.50", eth_dynamic_ip=False,
with_led_chaser=True, with_video_terminal=False, with_video_framebuffer=False, with_led_chaser=True, with_video_terminal=False, with_video_framebuffer=False,