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colorlight_i9plus: Cosmetic cleanups.

This commit is contained in:
Florent Kermarrec 2023-08-30 17:22:11 +02:00
parent 3471617878
commit b92c96b3a4
2 changed files with 46 additions and 43 deletions
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17
litex_boards/platforms/colorlight_i9plus.py
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@ -11,10 +11,13 @@ from litex.build.openocd import OpenOCD
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
_io = [ _io = [
# Clk.
("clk25", 0, Pins("K4"), IOStandard("LVCMOS33")), ("clk25", 0, Pins("K4"), IOStandard("LVCMOS33")),
# Leds.
("user_led", 0, Pins("A18"), IOStandard("LVCMOS33")), ("user_led", 0, Pins("A18"), IOStandard("LVCMOS33")),
# RGMII Ethernet (B50612D) # RGMII Ethernet (B50612D) PHY 0.
("eth_clocks", 0, # U5 is SDIO phy #0 ("eth_clocks", 0, # U5 is SDIO phy #0
Subsignal("tx", Pins("A1")), Subsignal("tx", Pins("A1")),
Subsignal("rx", Pins("H4")), Subsignal("rx", Pins("H4")),
@ -30,6 +33,7 @@ _io = [
Subsignal("tx_data", Pins("B2 B1 C2 D2")), Subsignal("tx_data", Pins("B2 B1 C2 D2")),
IOStandard("LVCMOS33") IOStandard("LVCMOS33")
), ),
# RGMII Ethernet (B50612D) PHY 1.
("eth_clocks", 1, # U9 is SDIO phy #1 ("eth_clocks", 1, # U9 is SDIO phy #1
Subsignal("tx", Pins("M6")), Subsignal("tx", Pins("M6")),
Subsignal("rx", Pins("L3")), Subsignal("rx", Pins("L3")),
@ -45,12 +49,12 @@ _io = [
Subsignal("tx_data", Pins("M5 M2 N4 P4")), Subsignal("tx_data", Pins("M5 M2 N4 P4")),
IOStandard("LVCMOS33") IOStandard("LVCMOS33")
), ),
# M12L64322A # SDRRAM (M12L64322A).
("sdram_clock", 0, Pins("E14"), IOStandard("LVCMOS33")), ("sdram_clock", 0, Pins("E14"), IOStandard("LVCMOS33")),
("sdram", 0, ("sdram", 0,
Subsignal("a", Pins( Subsignal("a", Pins(
"C20 C19 C13 F13 G13 G15 " "C20 C19 C13 F13 G13 G15 "
"F14 F18 E13 E18 C14 A13")), # address pin A11 routed but NC on M12L64322A "F14 F18 E13 E18 C14 A13")), # Address pin A11 routed but NC on M12L64322A
Subsignal("dq", Pins( Subsignal("dq", Pins(
"F21 E22 F20 E21 F19 D22 E19 D21 " "F21 E22 F20 E21 F19 D22 E19 D21 "
"K21 L21 K22 M21 L20 M22 N20 M20 " "K21 L21 K22 M21 L20 M22 N20 M20 "
@ -60,10 +64,10 @@ _io = [
Subsignal("we_n", Pins("D17")), Subsignal("we_n", Pins("D17")),
Subsignal("ras_n", Pins("A14")), Subsignal("ras_n", Pins("A14")),
Subsignal("cas_n", Pins("D14")), Subsignal("cas_n", Pins("D14")),
#Subsignal("cs_n", Pins("")), # gnd #Subsignal("cs_n", Pins("")), # GND
#Subsignal("cke", Pins("")), # 3v3 #Subsignal("cke", Pins("")), # 3V3
Subsignal("ba", Pins("D19 B13")), Subsignal("ba", Pins("D19 B13")),
#Subsignal("dm", Pins("")), # gnd #Subsignal("dm", Pins("")), # GND
IOStandard("LVCMOS33"), IOStandard("LVCMOS33"),
Misc("SLEWRATE=FAST") Misc("SLEWRATE=FAST")
), ),
@ -97,7 +101,6 @@ _connectors = [
) )
] ]
def pmod_uart(port="P2"): def pmod_uart(port="P2"):
if port == "P2": if port == "P2":
return [ return [