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platforms/ecp5_evn: rename spiflash1x to spiflash, rewrite hardware/configuration description and remove make_spiflash. 

The Platform file should not contain import code related to cores, this has to be done in the target.
This commit is contained in:
Florent Kermarrec 2020-05-19 15:29:06 +02:00
parent 3f0f12011b
commit c2cd863658
1 changed files with 14 additions and 20 deletions
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34
litex_boards/platforms/ecp5_evn.py
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@ -4,7 +4,6 @@
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.lattice import LatticePlatform from litex.build.lattice import LatticePlatform
from litex.build.lattice.programmer import OpenOCDJTAGProgrammer from litex.build.lattice.programmer import OpenOCDJTAGProgrammer
from litex.soc.cores.spi_flash import SpiFlash
import os import os
@ -39,12 +38,7 @@ _io = [
Subsignal("tx", Pins("P3"), IOStandard("LVCMOS33")), Subsignal("tx", Pins("P3"), IOStandard("LVCMOS33")),
), ),
("spiflash4x", 0, ("spiflashx", 0,
Subsignal("cs_n", Pins("R2"), IOStandard("LVCMOS33")),
Subsignal("dq", Pins("W2 V2 Y2 W1"), IOStandard("LVCMOS33")),
),
("spiflash1x", 0,
Subsignal("cs_n", Pins("R2"), IOStandard("LVCMOS33")), Subsignal("cs_n", Pins("R2"), IOStandard("LVCMOS33")),
Subsignal("mosi", Pins("W2"), IOStandard("LVCMOS33")), Subsignal("mosi", Pins("W2"), IOStandard("LVCMOS33")),
Subsignal("miso", Pins("V2"), IOStandard("LVCMOS33")), Subsignal("miso", Pins("V2"), IOStandard("LVCMOS33")),
@ -52,6 +46,11 @@ _io = [
Subsignal("hold", Pins("W1"), IOStandard("LVCMOS33")), Subsignal("hold", Pins("W1"), IOStandard("LVCMOS33")),
), ),
("spiflash4x", 0,
Subsignal("cs_n", Pins("R2"), IOStandard("LVCMOS33")),
Subsignal("dq", Pins("W2 V2 Y2 W1"), IOStandard("LVCMOS33")),
),
("clk200", 0, ("clk200", 0,
Subsignal("p", Pins("Y19")), Subsignal("p", Pins("Y19")),
Subsignal("n", Pins("W20")), Subsignal("n", Pins("W20")),
@ -134,22 +133,17 @@ class Platform(LatticePlatform):
def __init__(self, **kwargs): def __init__(self, **kwargs):
LatticePlatform.__init__(self, "LFE5UM5G-85F-8BG381", _io, _connectors, **kwargs) LatticePlatform.__init__(self, "LFE5UM5G-85F-8BG381", _io, _connectors, **kwargs)
def make_spiflash(self):
flash_pads = self.request("spiflash1x")
spiflash = SpiFlash(flash_pads, endianness="little", div=2, dummy=8)
spiflash.add_clk_primitive(self.device)
return spiflash
def request(self, *args, **kwargs): def request(self, *args, **kwargs):
import time
if "serial" in args: if "serial" in args:
print("R22 and R23 should be removed, two 0 Ω resistors shoud be " msg = "FT2232H will be used as serial, make sure that:\n"
"populated on R34 and R35 and the FT2232H should be configured to " msg += " -the hardware has been modified: R22 and R23 should be removed, two 0 Ω resistors shoud be populated on R34 and R35.\n"
"UART with virtual COM on port B") msg += " -the chip is configured as UART with virtual COM on port B (With FTProg or https://github.com/trabucayre/fixFT2232_ecp5evn)."
print("Make sure your on-board FT2232H can properly talk UART.") print(msg)
print("Follow instructions here: https://github.com/trabucayre/fixFT2232_ecp5evn") time.sleep(2)
if "ext_clk50" in args: if "ext_clk50" in args:
print("an oscillator must be populated on X5") print("An oscillator must be populated on X5.")
time.sleep(2)
return LatticePlatform.request(self, *args, **kwargs) return LatticePlatform.request(self, *args, **kwargs)