terasic_de2_115: Cosmetic cleanup.
This commit is contained in:
Florent Kermarrec
parent
d8228c2c0f
commit
c7ad9adacb
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@ -16,16 +16,16 @@ _io = [
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("clk25", 0, Pins("A14"), IOStandard("3.3-V LVTTL")),
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# Red LEDs
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("user_led", 0, Pins("G19"), IOStandard("2.5 V")),
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("user_led", 1, Pins("F19"), IOStandard("2.5 V")),
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("user_led", 2, Pins("E19"), IOStandard("2.5 V")),
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("user_led", 3, Pins("F21"), IOStandard("2.5 V")),
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("user_led", 4, Pins("F18"), IOStandard("2.5 V")),
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("user_led", 5, Pins("E18"), IOStandard("2.5 V")),
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("user_led", 6, Pins("J19"), IOStandard("2.5 V")),
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("user_led", 7, Pins("H19"), IOStandard("2.5 V")),
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("user_led", 8, Pins("J17"), IOStandard("2.5 V")),
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("user_led", 9, Pins("G17"), IOStandard("2.5 V")),
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("user_led", 0, Pins("G19"), IOStandard("2.5 V")),
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("user_led", 1, Pins("F19"), IOStandard("2.5 V")),
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("user_led", 2, Pins("E19"), IOStandard("2.5 V")),
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("user_led", 3, Pins("F21"), IOStandard("2.5 V")),
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("user_led", 4, Pins("F18"), IOStandard("2.5 V")),
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("user_led", 5, Pins("E18"), IOStandard("2.5 V")),
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("user_led", 6, Pins("J19"), IOStandard("2.5 V")),
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("user_led", 7, Pins("H19"), IOStandard("2.5 V")),
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("user_led", 8, Pins("J17"), IOStandard("2.5 V")),
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("user_led", 9, Pins("G17"), IOStandard("2.5 V")),
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("user_led", 10, Pins("J15"), IOStandard("2.5 V")),
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("user_led", 11, Pins("H16"), IOStandard("2.5 V")),
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("user_led", 12, Pins("J16"), IOStandard("2.5 V")),
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@ -76,18 +76,18 @@ _io = [
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IOStandard("2.5 V")
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),
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("eth", 0,
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Subsignal("rst_n", Pins("C19")),
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Subsignal("int_n", Pins("A21")),
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Subsignal("mdio", Pins("B21")),
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Subsignal("mdc", Pins("C20")),
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Subsignal("rx_dv", Pins("C17")),
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Subsignal("rx_er", Pins("D18")),
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Subsignal("rst_n", Pins("C19")),
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Subsignal("int_n", Pins("A21")),
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Subsignal("mdio", Pins("B21")),
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Subsignal("mdc", Pins("C20")),
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Subsignal("rx_dv", Pins("C17")),
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Subsignal("rx_er", Pins("D18")),
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Subsignal("rx_data", Pins("C16 D16 D17 C15")),
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Subsignal("tx_en", Pins("A18")),
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Subsignal("tx_er", Pins("B18")),
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Subsignal("tx_en", Pins("A18")),
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Subsignal("tx_er", Pins("B18")),
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Subsignal("tx_data", Pins("C18 D19 A19 B19")),
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Subsignal("col", Pins("E15")),
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Subsignal("crs", Pins("D15")),
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Subsignal("col", Pins("E15")),
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Subsignal("crs", Pins("D15")),
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IOStandard("2.5 V")
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),
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@ -51,16 +51,14 @@ class _CRG(LiteXModule):
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# BaseSoC ------------------------------------------------------------------------------------------
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class BaseSoC(SoCCore):
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def __init__(
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self,
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sys_clk_freq=50e6,
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with_ethernet=False,
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with_etherbone=False,
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with_sdcard=False,
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with_led_chaser=True,
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ethernet_phy=0,
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etherbone_ip="192.168.1.50",
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etherbone_phy=1,
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def __init__(self, sys_clk_freq=50e6,
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with_ethernet = False,
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with_etherbone = False,
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with_sdcard = False,
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with_led_chaser = True,
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ethernet_phy = 0,
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etherbone_ip = "192.168.1.50",
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etherbone_phy = 1,
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**kwargs,
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):
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platform = terasic_de2_115.Platform()
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@ -83,16 +81,16 @@ class BaseSoC(SoCCore):
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# Add debug interface if the CPU has one ---------------------------------------------------
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if hasattr(self.cpu, "debug_bus"):
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self.register_mem(
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name="vexriscv_debug",
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address=0xF00F0000,
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interface=self.cpu.debug_bus,
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size=0x100,
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name = "vexriscv_debug",
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address = 0xF00F0000,
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interface = self.cpu.debug_bus,
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size = 0x100,
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)
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# Leds -------------------------------------------------------------------------------------
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if with_led_chaser:
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self.leds = LedChaser(
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pads=platform.request_all("user_led"), sys_clk_freq=sys_clk_freq
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pads = platform.request_all("user_led"), sys_clk_freq=sys_clk_freq
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)
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self.leds.add_pwm()
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@ -104,24 +102,24 @@ class BaseSoC(SoCCore):
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if with_ethernet:
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# Ethernet PHY
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self.submodules.ethphy = LiteEthPHYMII(
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clock_pads=platform.request("eth_clocks", ethernet_phy),
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pads=platform.request("eth", ethernet_phy),
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clock_pads = platform.request("eth_clocks", ethernet_phy),
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pads = platform.request("eth", ethernet_phy),
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)
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self.add_ethernet(
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phy=self.ethphy,
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phy_cd="ethphy_eth" if with_etherbone else "eth",
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dynamic_ip=True,
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phy = self.ethphy,
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phy_cd = "ethphy_eth" if with_etherbone else "eth",
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dynamic_ip = True,
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)
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if with_etherbone:
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# Ethernet PHY
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self.submodules.ethbphy = LiteEthPHYMII(
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clock_pads=platform.request("eth_clocks", etherbone_phy),
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pads=platform.request("eth", etherbone_phy),
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clock_pads = platform.request("eth_clocks", etherbone_phy),
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pads = platform.request("eth", etherbone_phy),
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)
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self.add_etherbone(
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phy=self.ethbphy,
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phy_cd="ethbphy_eth" if with_ethernet else "eth",
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ip_address=etherbone_ip,
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phy = self.ethbphy,
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phy_cd = "ethbphy_eth" if with_ethernet else "eth",
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ip_address = etherbone_ip,
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)
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# Build --------------------------------------------------------------------------------------------
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@ -130,25 +128,25 @@ def main():
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from litex.build.parser import LiteXArgumentParser
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parser = LiteXArgumentParser(platform=terasic_de2_115.Platform, description="LiteX SoC on DE2-115.")
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parser.add_target_argument("--sys-clk-freq", default=50e6, type=float, help="System clock frequency.")
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parser.add_target_argument("--with-led-chaser", action="store_true", help="Enable LED chaser.")
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parser.add_target_argument("--with-sdcard", action="store_true", help="Enable SD card support.")
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parser.add_target_argument("--with-ethernet", action="store_true", help="Enable Ethernet support.")
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parser.add_target_argument("--with-etherbone", action="store_true", help="Enable Etherbone support.")
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parser.add_target_argument("--etherbone-ip", default="192.168.48.100", help="Etherbone IP address.")
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parser.add_target_argument("--etherbone-phy", default=1, type=int, help="Etherbone PHY (0 or 1).")
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parser.add_target_argument("--ethernet-phy", default=0, type=int, help="Ethernet PHY (0 or 1).")
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parser.add_target_argument("--sys-clk-freq", default=50e6, type=float, help="System clock frequency.")
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parser.add_target_argument("--with-led-chaser", action="store_true", help="Enable LED chaser.")
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parser.add_target_argument("--with-sdcard", action="store_true", help="Enable SD card support.")
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parser.add_target_argument("--with-ethernet", action="store_true", help="Enable Ethernet support.")
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parser.add_target_argument("--with-etherbone", action="store_true", help="Enable Etherbone support.")
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parser.add_target_argument("--etherbone-ip", default="192.168.48.100", help="Etherbone IP address.")
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parser.add_target_argument("--etherbone-phy", default=1, type=int, help="Etherbone PHY (0 or 1).")
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parser.add_target_argument("--ethernet-phy", default=0, type=int, help="Ethernet PHY (0 or 1).")
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args = parser.parse_args()
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soc = BaseSoC(
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sys_clk_freq=args.sys_clk_freq,
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with_sdcard=args.with_sdcard,
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with_ethernet=args.with_ethernet,
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with_etherbone=args.with_etherbone,
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with_led_chaser=args.with_led_chaser,
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etherbone_ip=args.etherbone_ip,
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etherbone_phy=args.etherbone_phy,
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ethernet_phy=args.ethernet_phy,
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sys_clk_freq = args.sys_clk_freq,
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with_sdcard = args.with_sdcard,
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with_ethernet = args.with_ethernet,
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with_etherbone = args.with_etherbone,
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with_led_chaser = args.with_led_chaser,
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etherbone_ip = args.etherbone_ip,
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etherbone_phy = args.etherbone_phy,
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ethernet_phy = args.ethernet_phy,
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**parser.soc_argdict,
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)
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