Add ColorLight i9 v7.2
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@ -7,6 +7,8 @@
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# The Colorlight i5 PCB and IOs have been documented by @wuxx
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# The Colorlight i5 PCB and IOs have been documented by @wuxx
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# https://github.com/wuxx/Colorlight-FPGA-Projects
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# https://github.com/wuxx/Colorlight-FPGA-Projects
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import copy
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from litex.build.generic_platform import *
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice.programmer import EcpDapProgrammer
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from litex.build.lattice.programmer import EcpDapProgrammer
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@ -116,6 +118,45 @@ _connectors_v7_0 = [
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("pmodf", "D1 C1 C2 E3 E2 D2 B1 A3"),
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("pmodf", "D1 C1 C2 E3 E2 D2 B1 A3"),
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]
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]
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# ColorLight i9 V 7.2 hardware
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# See https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/colorlight_i9_v7.2.md
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# SPIFlash (W25Q64JVSIQ)
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_io_v7_2 = copy.deepcopy(_io_v7_0)
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# Change the LED pin to "L2"
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for i, x in enumerate(_io_v7_2):
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if x[:2] == ("user_led_n", 0):
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_io_v7_2[i] = ("user_led_n", 0, Pins("L2"), IOStandard("LVCMOS33"))
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break
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# optional, alternative uart location
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# requires "--uart-name serialx"
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_io_v7_2 += [
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("serialx", 0, Subsignal("tx", Pins("E5")), Subsignal("rx", Pins("F4")), IOStandard("LVCMOS33"))
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]
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_connectors_v7_2 = copy.deepcopy(_connectors_v7_0)
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# Append the rest of the pmod interfaces
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_connectors_v7_2 += [
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# P2
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("pmodc", "P17 R18 C18 L2 M17 R17 T18 K18"),
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("pmodd", "J20 L18 M18 N17 G20 K20 L20 N18"),
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# P4
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("pmodg", "H4 G3 F1 F2 H3 F3 E4 E1"),
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("pmodh", "- E19 B3 K5 - B2 K4 A2"),
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# P5
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("pmodi", "D18 G5 F5 E5 D17 D16 E6 F4"),
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("pmodj", "J17 H17 H16 G16 H18 G18 F18 E18"),
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# P6
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("pmodk", "R3 M4 L5 J16 N4 L4 P16 J18"),
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("pmodl", "R1 U1 W1 M1 T1 Y2 V1 N2"),
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]
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# PMODS --------------------------------------------------------------------------------------------
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# PMODS --------------------------------------------------------------------------------------------
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def sdcard_pmod_io(pmod):
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def sdcard_pmod_io(pmod):
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@ -147,12 +188,20 @@ class Platform(LatticePlatform):
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default_clk_name = "clk25"
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default_clk_name = "clk25"
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default_clk_period = 1e9/25e6
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default_clk_period = 1e9/25e6
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def __init__(self, revision="7.0", toolchain="trellis"):
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def __init__(self, board="i5", revision="7.0", toolchain="trellis"):
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assert revision in ["7.0"]
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if board == "i5":
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self.revision = revision
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assert revision in ["7.0"]
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device = {"7.0": "LFE5U-25F-6BG381C"}[revision]
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self.revision = revision
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io = {"7.0": _io_v7_0}[revision]
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device = {"7.0": "LFE5U-25F-6BG381C"}[revision]
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connectors = {"7.0": _connectors_v7_0}[revision]
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io = {"7.0": _io_v7_0}[revision]
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connectors = {"7.0": _connectors_v7_0}[revision]
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if board == "i9":
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assert revision in ["7.2"]
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self.revision = revision
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device = {"7.2": "LFE5U-45F-6BG381C"}[revision]
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io = {"7.2": _io_v7_2}[revision]
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connectors = {"7.2": _connectors_v7_2}[revision]
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LatticePlatform.__init__(self, device, io, connectors=connectors, toolchain=toolchain)
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LatticePlatform.__init__(self, device, io, connectors=connectors, toolchain=toolchain)
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def create_programmer(self):
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def create_programmer(self):
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@ -102,9 +102,8 @@ class BaseSoC(SoCCore):
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use_internal_osc=False, sdram_rate="1:1", with_video_terminal=False,
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use_internal_osc=False, sdram_rate="1:1", with_video_terminal=False,
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with_video_framebuffer=False, **kwargs):
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with_video_framebuffer=False, **kwargs):
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board = board.lower()
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board = board.lower()
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assert board in ["i5"]
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assert board in ["i5", "i9"]
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if board == "i5":
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platform = colorlight_i5.Platform(board=board, revision=revision)
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platform = colorlight_i5.Platform(revision=revision)
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# SoCCore ----------------------------------------------------------------------------------
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# SoCCore ----------------------------------------------------------------------------------
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SoCCore.__init__(self, platform, int(sys_clk_freq),
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SoCCore.__init__(self, platform, int(sys_clk_freq),
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@ -122,9 +121,13 @@ class BaseSoC(SoCCore):
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self.submodules.leds = LedChaser(pads=ledn, sys_clk_freq=sys_clk_freq)
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self.submodules.leds = LedChaser(pads=ledn, sys_clk_freq=sys_clk_freq)
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# SPI Flash --------------------------------------------------------------------------------
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# SPI Flash --------------------------------------------------------------------------------
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from litespi.modules import GD25Q16
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if board == "i5":
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from litespi.modules import GD25Q16 as SpiFlashModule
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if board == "i9":
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from litespi.modules import W25Q64 as SpiFlashModule
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from litespi.opcodes import SpiNorFlashOpCodes as Codes
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from litespi.opcodes import SpiNorFlashOpCodes as Codes
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self.add_spi_flash(mode="1x", module=GD25Q16(Codes.READ_1_1_1))
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self.add_spi_flash(mode="1x", module=SpiFlashModule(Codes.READ_1_1_1))
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# SDR SDRAM --------------------------------------------------------------------------------
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# SDR SDRAM --------------------------------------------------------------------------------
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if not self.integrated_main_ram_size:
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if not self.integrated_main_ram_size:
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