digilent_arty: Add --flash support.

This commit is contained in:
Florent Kermarrec 2022-02-09 17:51:56 +01:00
parent 4894926c40
commit d9b77c6f25
1 changed files with 5 additions and 0 deletions

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@ -134,6 +134,7 @@ def main():
parser.add_argument("--toolchain", default="vivado", help="FPGA toolchain (vivado, symbiflow or yosys+nextpnr).") parser.add_argument("--toolchain", default="vivado", help="FPGA toolchain (vivado, symbiflow or yosys+nextpnr).")
parser.add_argument("--build", action="store_true", help="Build bitstream.") parser.add_argument("--build", action="store_true", help="Build bitstream.")
parser.add_argument("--load", action="store_true", help="Load bitstream.") parser.add_argument("--load", action="store_true", help="Load bitstream.")
parser.add_argument("--flash", action="store_true", help="Flash bitstream.")
parser.add_argument("--variant", default="a7-35", help="Board variant (a7-35 or a7-100).") parser.add_argument("--variant", default="a7-35", help="Board variant (a7-35 or a7-100).")
parser.add_argument("--sys-clk-freq", default=100e6, help="System clock frequency.") parser.add_argument("--sys-clk-freq", default=100e6, help="System clock frequency.")
ethopts = parser.add_mutually_exclusive_group() ethopts = parser.add_mutually_exclusive_group()
@ -185,5 +186,9 @@ def main():
prog = soc.platform.create_programmer() prog = soc.platform.create_programmer()
prog.load_bitstream(os.path.join(builder.gateware_dir, soc.build_name + ".bit")) prog.load_bitstream(os.path.join(builder.gateware_dir, soc.build_name + ".bit"))
if args.flash:
prog = soc.platform.create_programmer()
prog.flash(0, os.path.join(builder.gateware_dir, soc.build_name + ".bin"))
if __name__ == "__main__": if __name__ == "__main__":
main() main()