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sqrl_acorn: Switch back to PCIe Gen2 X4 and enable 64-bit addressing (Not really useful except for 64-bit addressing tests).
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1 changed files with 2 additions and 2 deletions
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@ -104,10 +104,10 @@ class BaseSoC(SoCCore):
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# PCIe -------------------------------------------------------------------------------------
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if with_pcie:
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self.submodules.pcie_phy = S7PCIEPHY(platform, platform.request("pcie_x1"),
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self.submodules.pcie_phy = S7PCIEPHY(platform, platform.request("pcie_x4"),
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data_width = 128,
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bar0_size = 0x20000)
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self.add_pcie(phy=self.pcie_phy, ndmas=1)
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self.add_pcie(phy=self.pcie_phy, ndmas=1, address_width=64)
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# FIXME: Apply it to all targets (integrate it in LitePCIe?).
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platform.add_period_constraint(self.crg.cd_sys.clk, 1e9/sys_clk_freq)
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platform.toolchain.pre_placement_commands.add("set_clock_groups -group [get_clocks {sys_clk}] -group [get_clocks userclk2] -asynchronous", sys_clk=self.crg.cd_sys.clk)
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