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sipeed_tang_primer_20k: Swithc to GW2APLL.

This commit is contained in:
Florent Kermarrec 2022-06-03 12:01:49 +02:00
parent 6e33d9249f
commit ddc6140e25
1 changed files with 2 additions and 2 deletions
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4
litex_boards/targets/sipeed_tang_primer_20k.py
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@ -9,7 +9,7 @@
from migen import * from migen import *
from migen.genlib.resetsync import AsyncResetSynchronizer from migen.genlib.resetsync import AsyncResetSynchronizer
from litex.soc.cores.clock.gowin_gw1n import GW1NPLL from litex.soc.cores.clock.gowin_gw2a import GW2APLL
from litex.soc.integration.soc_core import * from litex.soc.integration.soc_core import *
from litex.soc.integration.soc import SoCRegion from litex.soc.integration.soc import SoCRegion
from litex.soc.integration.builder import * from litex.soc.integration.builder import *
@ -36,7 +36,7 @@ class _CRG(Module):
clk27 = platform.request("clk27") clk27 = platform.request("clk27")
# PLL # PLL
self.submodules.pll = pll = GW1NPLL(devicename=platform.devicename, device=platform.device) self.submodules.pll = pll = GW2APLL(devicename=platform.devicename, device=platform.device)
pll.register_clkin(clk27, 27e6) pll.register_clkin(clk27, 27e6)
pll.create_clkout(self.cd_sys, sys_clk_freq) pll.create_clkout(self.cd_sys, sys_clk_freq)