targets/trellisboard: add initial LiteSDCard support
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
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@ -33,6 +33,7 @@ class _CRG(Module):
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self.clock_domains.cd_sys = ClockDomain()
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self.clock_domains.cd_sys2x = ClockDomain()
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self.clock_domains.cd_sys2x_i = ClockDomain(reset_less=True)
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self.clock_domains.cd_clk10 = ClockDomain() # FIXME: LiteSDCard test
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# # #
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@ -55,6 +56,7 @@ class _CRG(Module):
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pll.register_clkin(clk12, 12e6)
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pll.create_clkout(self.cd_sys2x_i, 2*sys_clk_freq)
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pll.create_clkout(self.cd_init, 25e6)
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pll.create_clkout(self.cd_clk10, 10e6)
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self.specials += [
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Instance("ECLKBRIDGECS",
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i_CLK0 = self.cd_sys2x_i.clk,
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@ -71,8 +73,9 @@ class _CRG(Module):
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i_CLKI = self.cd_sys2x.clk,
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i_RST = self.cd_sys2x.rst,
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o_CDIVX = self.cd_sys.clk),
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AsyncResetSynchronizer(self.cd_init, ~por_done | ~pll.locked | rst),
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AsyncResetSynchronizer(self.cd_sys, ~por_done | ~pll.locked | rst)
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AsyncResetSynchronizer(self.cd_init, ~por_done | ~pll.locked | rst),
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AsyncResetSynchronizer(self.cd_sys, ~por_done | ~pll.locked | rst),
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AsyncResetSynchronizer(self.cd_clk10, ~por_done | ~pll.locked | rst)
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]
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self.comb += platform.request("dram_vtt_en").eq(1)
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@ -132,13 +135,17 @@ def main():
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parser.add_argument("--sys-clk-freq", default=75e6, help="system clock frequency (default=75MHz)")
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parser.add_argument("--with-ethernet", action="store_true", help="enable Ethernet support")
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parser.add_argument("--with-spi-sdcard", action="store_true", help="enable SPI-mode SDCard support")
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parser.add_argument("--with-sdcard", action="store_true", help="enable SDCard support")
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args = parser.parse_args()
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soc = BaseSoC(sys_clk_freq=int(float(args.sys_clk_freq)),
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with_ethernet=args.with_ethernet,
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**soc_sdram_argdict(args))
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assert not (args.with_spi_sdcard and args.with_sdcard)
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if args.with_spi_sdcard:
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soc.add_spi_sdcard()
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if args.with_sdcard:
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soc.add_sdcard()
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builder = Builder(soc, **builder_argdict(args))
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builder_kargs = trellis_argdict(args) if args.toolchain == "trellis" else {}
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builder.build(**builder_kargs, run=args.build)
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