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Merge pull request #113 from kbeckmann/versa_etherbone 

versa_ecp5: Add etherbone support
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enjoy-digital 2020-10-09 12:58:08 +02:00 committed by GitHub
parent 55da8b867a 477734ff06
commit fcf3e44e0e
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1 changed files with 18 additions and 7 deletions
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litex_boards/targets/versa_ecp5.py
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@ -78,7 +78,7 @@ class _CRG(Module):
# BaseSoC ------------------------------------------------------------------------------------------ # BaseSoC ------------------------------------------------------------------------------------------
class BaseSoC(SoCCore): class BaseSoC(SoCCore):
def __init__(self, sys_clk_freq=int(75e6), device="LFE5UM5G", with_ethernet=False, toolchain="trellis", **kwargs): def __init__(self, sys_clk_freq=int(75e6), device="LFE5UM5G", with_ethernet=False, with_etherbone=False, toolchain="trellis", **kwargs):
platform = versa_ecp5.Platform(toolchain=toolchain, device=device) platform = versa_ecp5.Platform(toolchain=toolchain, device=device)
# FIXME: adapt integrated rom size for Microwatt # FIXME: adapt integrated rom size for Microwatt
@ -120,6 +120,14 @@ class BaseSoC(SoCCore):
self.add_csr("ethphy") self.add_csr("ethphy")
self.add_ethernet(phy=self.ethphy) self.add_ethernet(phy=self.ethphy)
# Etherbone --------------------------------------------------------------------------------
if with_etherbone:
self.submodules.ethphy = LiteEthPHYRGMII(
clock_pads = self.platform.request("eth_clocks"),
pads = self.platform.request("eth"))
self.add_csr("ethphy")
self.add_etherbone(phy=self.ethphy)
# Leds ------------------------------------------------------------------------------------- # Leds -------------------------------------------------------------------------------------
self.submodules.leds = LedChaser( self.submodules.leds = LedChaser(
pads = platform.request_all("user_led"), pads = platform.request_all("user_led"),
@ -139,11 +147,14 @@ def main():
parser.add_argument("--sys-clk-freq", default=75e6, help="System clock frequency (default=75MHz)") parser.add_argument("--sys-clk-freq", default=75e6, help="System clock frequency (default=75MHz)")
parser.add_argument("--device", default="LFE5UM5G", help="ECP5 device (LFE5UM5G (default) or LFE5UM)") parser.add_argument("--device", default="LFE5UM5G", help="ECP5 device (LFE5UM5G (default) or LFE5UM)")
parser.add_argument("--with-ethernet", action="store_true", help="Enable Ethernet support") parser.add_argument("--with-ethernet", action="store_true", help="Enable Ethernet support")
parser.add_argument("--with-etherbone", action="store_true", help="Enable Etherbone support")
args = parser.parse_args() args = parser.parse_args()
assert not (args.with_ethernet and args.with_etherbone)
soc = BaseSoC(sys_clk_freq=int(float(args.sys_clk_freq)), soc = BaseSoC(sys_clk_freq=int(float(args.sys_clk_freq)),
device = args.device, device = args.device,
with_ethernet = args.with_ethernet, with_ethernet = args.with_ethernet,
with_etherbone = args.with_etherbone,
toolchain = args.toolchain, toolchain = args.toolchain,
**soc_sdram_argdict(args)) **soc_sdram_argdict(args))
builder = Builder(soc, **builder_argdict(args)) builder = Builder(soc, **builder_argdict(args))