Merge pull request #318 from Logicwax/master

fix(vc707): fix 'dat' typo
2022-01-06 08:49:24 +01:00 · 2022-01-06 08:49:24 +01:00 · fd70f5f125
parent db9173ad8b 6b0bd4da4d
commit fd70f5f125
1 changed files with 1 additions and 1 deletions
--- a/litex_boards/platforms/xilinx_vc707.py
+++ b/litex_boards/platforms/xilinx_vc707.py
@ -87,7 +87,7 @@ _io = [
        Subsignal("cmd", Pins("AP30")),
        Subsignal("det", Pins("AP32")),
        Subsignal("wp",  Pins("AR32")),
-        Subsignal("dat", Pins("AR30 AU31 AV31 AT30")),
+        Subsignal("data", Pins("AR30 AU31 AV31 AT30")),
        IOStandard("LVCMOS18"),
    ),