2 Commits

Author	SHA1	Message	Date
Florent Kermarrec	1356ebb416	targets/ecp5: update clocking on boards with DDR3 to use reset from ddrphy.init and use primary clock for Power on reset.	2020-06-29 16:42:53 +02:00
Owen Kirby	76a32ba8ec	Add Logicbone ECP5 board ... The Logicbone is an Open Source development board for the Lattice ECP5 being developed at https://github.com/oskirby/logicbone	2020-06-27 03:32:47 -07:00