Florent Kermarrec
|
c6e75122d9
|
sds1104xe: defaults to Crossover UART.
|
2021-01-08 19:00:41 +01:00 |
Hans Baier
|
0ee62dd681
|
add etherbone ip address option for relevant boards
|
2021-01-08 18:44:31 +01:00 |
|
Florent Kermarrec
|
d73bd2f7ce
|
targets/xilinx: add comment on sys_clk to pll.clkin false path.
|
2021-01-07 08:01:54 +01:00 |
|
Florent Kermarrec
|
1ac1c6857f
|
targets/xilinx: add false path constraint between sys_clk and pll.clkin.
The SoC reset added recently creates a path between sys_clk and pll.clkin
clock domains that is reported by the tools but that can be safely ignored.
|
2021-01-07 00:02:46 +01:00 |
|
Florent Kermarrec
|
519f9449fa
|
targets/sds1104: litex_term now directly supports crossover uart.
|
2020-12-10 13:56:01 +01:00 |
|
Florent Kermarrec
|
27f60b2e93
|
add initial Siglent SDS1104X-E support (Ethernet & DDR3 validated).
Pinout from https://github.com/360nosc0pe project.
|
2020-11-13 12:20:15 +01:00 |