Commit Graph

10 Commits

Author SHA1 Message Date
Gwenhael Goavec-Merou 62b5b58aec platforms,targets/xilinx_zc706: added choice between vivado(default) and openFPGALoader, re-enable DDR 2024-04-08 20:38:09 +02:00
Gwenhael Goavec-Merou 2392473b89 targets/xilinx_zc706: typo ZCU -> ZC 2024-03-30 11:54:28 +01:00
Gwenhael Goavec-Merou a72f2a2e68 targets/xilinx_zc706: typo... 2024-03-29 07:18:19 +01:00
Gwenhael Goavec-Merou 27dce96bf8 targets/xilinx_zc706: SFP/etherbone working: added a note to use it 2024-03-29 07:16:53 +01:00
Gwenhael Goavec-Merou 917ae33351 targets/xilinx_zc706: temporary disabled ddr3 2024-03-29 07:11:06 +01:00
Florent Kermarrec 57a9970257 xilinx_zc706: ADD DDR3 support in target and update/fix IOs definition in platform (Untested on hardware).
- Use/Mimic IO standards from KC705.
- Keep it to single rank for now (but add dual rank IOs in comments).
- Add DCI cascade property.
- Add sys4x and idelay clocking.
- Add LiteDRAM PHY/Core support.
2024-03-27 08:51:30 +01:00
Florent Kermarrec 8a5b83125b xilinx_zc706: Add Ethernet/Etherbone support through SFP/K7_1000BaseX (Untested on hardware). 2024-03-26 21:53:45 +01:00
Florent Kermarrec a29532b5d7 xilinx_zc706: Add PCIe Gen2 X4 support (Untested on hardware). 2024-03-26 21:41:41 +01:00
Florent Kermarrec fdd4edbd1a xilinx_zc706: Review/Minor changes. 2024-03-26 21:35:10 +01:00
Gwenhael Goavec-Merou 6b35c47e8b xilinx_zc706: new Xilinx/AMD Zynq7000 based board 2024-03-26 20:49:54 +01:00