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2172 commits 9 branches 14 tags 12 MiB
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6 commits

Author SHA1 Message Date
Gwenhael Goavec-Merou
62b5b58aec platforms,targets/xilinx_zc706: added choice between vivado(default) and openFPGALoader, re-enable DDR 2024-04-08 20:38:09 +02:00
Gwenhael Goavec-Merou
3bd14f541e platforms/xilinx_zc706: added missing i2c node 2024-04-05 10:47:33 +02:00
Florent Kermarrec
57a9970257 xilinx_zc706: ADD DDR3 support in target and update/fix IOs definition in platform (Untested on hardware). 
- Use/Mimic IO standards from KC705.
- Keep it to single rank for now (but add dual rank IOs in comments).
- Add DCI cascade property.
- Add sys4x and idelay clocking.
- Add LiteDRAM PHY/Core support.
 2024-03-27 08:51:30 +01:00
Gwenhael Goavec-Merou
6ec1cfe401 xilinx_zc706: add missing peripherals/resources 2024-03-26 21:57:21 +01:00
Florent Kermarrec
fdd4edbd1a xilinx_zc706: Review/Minor changes. 2024-03-26 21:35:10 +01:00
Gwenhael Goavec-Merou
6b35c47e8b xilinx_zc706: new Xilinx/AMD Zynq7000 based board 2024-03-26 20:49:54 +01:00