Florent Kermarrec
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aad8154e3a
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targets/sds1104xe: Enable both Ethernet/Etherbone with hybrid LiteEthMAC.
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2021-02-23 15:27:50 +01:00 |
|
Florent Kermarrec
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11405d9ee3
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targets/sds1104xe/BaseSoC: Enable Etherbone by default also defaults to Crossover UART when kwargs is empty.
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2021-02-18 19:30:05 +01:00 |
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Florent Kermarrec
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c6e75122d9
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sds1104xe: defaults to Crossover UART.
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2021-01-08 19:00:41 +01:00 |
Hans Baier
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0ee62dd681
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add etherbone ip address option for relevant boards
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2021-01-08 18:44:31 +01:00 |
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Florent Kermarrec
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d73bd2f7ce
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targets/xilinx: add comment on sys_clk to pll.clkin false path.
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2021-01-07 08:01:54 +01:00 |
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Florent Kermarrec
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1ac1c6857f
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targets/xilinx: add false path constraint between sys_clk and pll.clkin.
The SoC reset added recently creates a path between sys_clk and pll.clkin
clock domains that is reported by the tools but that can be safely ignored.
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2021-01-07 00:02:46 +01:00 |
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Florent Kermarrec
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519f9449fa
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targets/sds1104: litex_term now directly supports crossover uart.
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2020-12-10 13:56:01 +01:00 |
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Florent Kermarrec
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27f60b2e93
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add initial Siglent SDS1104X-E support (Ethernet & DDR3 validated).
Pinout from https://github.com/360nosc0pe project.
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2020-11-13 12:20:15 +01:00 |