79 lines
2.5 KiB
Python
79 lines
2.5 KiB
Python
#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2023 Nimalan M <nimalan.m@protonmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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# The Alchitry Cu is FPGA Development board
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# by SparkFun - https://www.sparkfun.com/products/16526.
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#
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# It has a Lattice ICE40HX8K-CB132IC and can be programmed
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# with the Icestorm toolchain
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# Schematic - https://cdn.sparkfun.com/assets/2/6/e/5/e/alchitry_cu_sch_update.pdf
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticeiCE40Platform
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from litex.build.lattice.programmer import IceStormProgrammer
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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# Clk / Rst
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("clk100", 0, Pins("P7"), IOStandard("LVCMOS33")),
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("cpu_reset", 0, Pins("P8"), IOStandard("LVCMOS33")),
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# Leds
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("user_led", 0, Pins("J11"), IOStandard("LVCMOS33")),
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("user_led", 1, Pins("K11"), IOStandard("LVCMOS33")),
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("user_led", 2, Pins("K12"), IOStandard("LVCMOS33")),
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("user_led", 3, Pins("K14"), IOStandard("LVCMOS33")),
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("user_led", 4, Pins("L12"), IOStandard("LVCMOS33")),
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("user_led", 5, Pins("L14"), IOStandard("LVCMOS33")),
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("user_led", 6, Pins("M12"), IOStandard("LVCMOS33")),
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("user_led", 7, Pins("N14"), IOStandard("LVCMOS33")),
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# Serial
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("serial", 0,
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Subsignal("tx", Pins("P14")),
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Subsignal("rx", Pins("M9")),
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IOStandard("LVCMOS33")
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),
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# Onboard QWIIC
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("i2c", 0,
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Subsignal("scl", Pins("A4")),
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Subsignal("sda", Pins("A3")),
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IOStandard("LVCMOS33"),
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),
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# SPIFlash X25XXSMD1
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("spiflash", 0,
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Subsignal("mosi", Pins("M11")),
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Subsignal("miso", Pins("P11")),
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Subsignal("sck", Pins("P12")),
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Subsignal("ss", Pins("P13")),
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IOStandard("LVCMOS33")
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = []
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticeiCE40Platform):
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default_clk_name = "clk100"
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default_clk_period = 1e9/100e6
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def __init__(self, toolchain="icestorm", **kwargs):
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LatticeiCE40Platform.__init__(self, "ice40-hx8k-cb132", _io, _connectors, toolchain=toolchain)
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def create_programmer(self):
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return IceStormProgrammer()
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def do_finalize(self, fragment):
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LatticeiCE40Platform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
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