litex-boards/litex_boards
Ilia Sergachev 099d947a49 sqrl_acorn: fix vivado cfgbvs and config_voltage warnings 2021-11-07 16:18:22 +01:00
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platforms sqrl_acorn: fix vivado cfgbvs and config_voltage warnings 2021-11-07 16:18:22 +01:00
prog prog/openocd_butterstick: Set _CHIPNAME to ecp5 (for jtag_uart/jtag_bone). 2021-10-27 17:27:07 +02:00
targets qmtech_5cefa2: tuned the clock phase shift to be able to run the system at 105MHz 2021-11-06 09:58:10 +07:00
tools general: add SPDX License identifier to header and specify files are part of LiteX-Boards. 2020-08-23 15:00:17 +02:00
__init__.py Add initial Fairwaves XTRX support (SoC with JTAG-UART and PCIe Gen2 X1). 2021-11-05 14:52:45 +01:00