Michael Betz 09c3bd616b Merge branch 'master' into vc707_clk		2021-02-19 22:49:46 -08:00
..
platforms	Merge branch 'master' into vc707_clk	2021-02-19 22:49:46 -08:00
prog	Add FPC-III board support.	2021-01-28 09:51:42 -07:00
targets	targets/sds1104xe/BaseSoC: Enable Etherbone by default also defaults to Crossover UART when kwargs is empty.	2021-02-18 19:30:05 +01:00
tools	general: add SPDX License identifier to header and specify files are part of LiteX-Boards.	2020-08-23 15:00:17 +02:00
__init__.py