296 lines
11 KiB
Python
296 lines
11 KiB
Python
#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2022 Icenowy Zheng <icenowy@aosc.io>
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# Copyright (c) 2022 Florent Kermarrec <florent@enjoy-digital.fr>
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# SPDX-License-Identifier: BSD-2-Clause
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from migen import *
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from litex.build.generic_platform import *
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from litex.build.gowin.platform import GowinPlatform
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from litex.build.gowin.programmer import GowinProgrammer
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from litex.build.openfpgaloader import OpenFPGALoader
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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# Clk / Rst.
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("clk27", 0, Pins("H11"), IOStandard("LVCMOS33")),
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# Serial.
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("serial", 0,
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Subsignal("rx", Pins("T13")), # CARD1:1
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Subsignal("tx", Pins("M11")), # CARD1:11
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IOStandard("LVCMOS33")
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),
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# SPIFlash.
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("spiflash", 0,
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Subsignal("cs_n", Pins("M9"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("L10"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("P10"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("R10"), IOStandard("LVCMOS33")),
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),
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# SDCard.
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("spisdcard", 0,
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Subsignal("clk", Pins("N10")),
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Subsignal("mosi", Pins("R14")),
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Subsignal("cs_n", Pins("N11")),
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Subsignal("miso", Pins("M8")),
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IOStandard("LVCMOS33"),
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),
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("sdcard", 0,
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Subsignal("data", Pins("M8 M7 M10 N11")),
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Subsignal("cmd", Pins("R14")),
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Subsignal("clk", Pins("N10")),
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Subsignal("cd", Pins("D15")),
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IOStandard("LVCMOS33"),
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),
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# DDR3 SDRAM IMD128M16R39CG8GNF-125.
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("ddram", 0,
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Subsignal("a", Pins("F7 A4 D6 F8 C4 E6 B1 D8 A5 F9 K3 B7 A3 C8"),
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IOStandard("SSTL15")),
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Subsignal("ba", Pins("H4 D3 H5"), IOStandard("SSTL15")),
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Subsignal("ras_n", Pins("R4"), IOStandard("SSTL15")),
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Subsignal("cas_n", Pins("R6"), IOStandard("SSTL15")),
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Subsignal("we_n", Pins("L2"), IOStandard("SSTL15")),
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Subsignal("cs_n", Pins("P5"), IOStandard("SSTL15")),
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Subsignal("dm", Pins("G1 K5"), IOStandard("SSTL15")),
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Subsignal("dq", Pins(
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"G5 F5 F4 F3 E2 C1 E1 B3",
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"M3 K4 N2 L1 P4 H3 R1 M2"),
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IOStandard("SSTL15"),
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Misc("VREF=INTERNAL")),
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Subsignal("dqs_p", Pins("G2 J5"), IOStandard("SSTL15D")),
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Subsignal("dqs_n", Pins("G3 K6"), IOStandard("SSTL15D")),
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Subsignal("clk_p", Pins("J1"), IOStandard("SSTL15D")),
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Subsignal("clk_n", Pins("J3"), IOStandard("SSTL15D")),
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Subsignal("cke", Pins("J2"), IOStandard("SSTL15")),
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Subsignal("odt", Pins("R3"), IOStandard("SSTL15")),
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Subsignal("reset_n", Pins("B9"), IOStandard("SSTL15")),
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),
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]
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# Dock 204 Pins SODIMM Connector -------------------------------------------------------------------
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_connectors = [
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["CARD1",
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# A.
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# -------------------------------------------------
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"---", # 0
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# GND GND 5V 5V 5V 5V GND GND NC ( 1-10).
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" T13 --- --- --- --- --- --- --- --- ---",
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# NC GND GND NC NC NC GND GND (11-20).
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" M11 --- --- --- T10 --- --- --- --- ---",
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# NC 3V3 NC 3V3 GND GND (21-30).
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" --- --- --- --- --- --- T6 R16 P6 P15",
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# GND GND GND GND (31-40).
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" --- --- T7 P16 R8 N15 --- --- T8 N16",
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# GND GND GND (41-50).
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" M6 N14 --- L16 T9 L14 P9 --- --- K15",
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# GND GND GND (51-60).
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" P11 K14 T11 --- --- K16 R11 J15 T12 ---",
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# GND GND (61-70).
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" --- H16 R12 H14 P13 --- R13 G16 T14 H15",
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# GND GND (71-72).
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" --- ---",
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# B.
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# -------------------------------------------------
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# NC (73-82).
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" M15 L13 M14 K11 F13 K12 G12 K13 T15 ---",
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# NC NC (83-92).
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" J16 H13 J14 J12 --- --- G14 H12 G15 G11",
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# NC NC NC NC NC (93-102).
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" --- --- F14 B10 F16 A13 --- --- E15 ---",
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# NC NC NC NC NC NC NC (103-112).
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" D15 --- --- --- A15 --- B14 --- --- ---",
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# NC NC NC NC NC NC (113-122).
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" A14 --- B13 --- --- --- C12 --- B12 ---",
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# NC NC GND GND (123-132).
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" A12 --- C11 --- --- --- B11 E16 A11 F15",
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# GND GND NC GND GND NC (133-142).
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" --- --- C10 C13 --- --- --- D16 --- E14",
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# GND GND GND GND (143-152).
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" B8 --- --- C9 C6 A9 A7 --- --- L12",
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# GND GBD GND GND (153-162).
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" A6 J11 --- --- C7 E9 D7 E8 --- ---",
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# VCC VCC GND GND VCC GND (163-172).
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" T2 --- T3 --- --- --- T4 --- T5 ---",
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# GND VCC GND GND (173-182).
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" --- --- N6 F10 N7 --- --- D11 N9 D10",
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# GND GND NC NC GND GND (183-192).
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" R9 --- --- E10 --- --- --- --- N8 R7",
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# GND GND NC NC NC NC (193-202).
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" L9 P7 --- --- --- M6 --- L8 --- ---",
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# NC NC (203-204).
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" --- ---",
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],
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]
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# Dock IOs -----------------------------------------------------------------------------------------
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_dock_io = [
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# Leds
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("led", 0, Pins( "CARD1:44"), IOStandard("LVCMOS33")),
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("led", 1, Pins( "CARD1:46"), IOStandard("LVCMOS33")),
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("led", 3, Pins( "CARD1:40"), IOStandard("LVCMOS33")),
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("led", 2, Pins( "CARD1:42"), IOStandard("LVCMOS33")),
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("led", 4, Pins( "CARD1:98"), IOStandard("LVCMOS33")),
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("led", 5, Pins("CARD1:136"), IOStandard("LVCMOS33")),
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# RGB Led.
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("rgb_led", 0, Pins("CARD1:45"), IOStandard("LVCMOS18")),
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# Buttons.
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("btn_n", 0, Pins( "CARD1:15"), IOStandard("LVCMOS33")),
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("btn_n", 1, Pins("CARD1:165"), IOStandard("LVCMOS15")),
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("btn_n", 2, Pins("CARD1:163"), IOStandard("LVCMOS15")),
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("btn_n", 3, Pins("CARD1:159"), IOStandard("LVCMOS15")),
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("btn_n", 4, Pins("CARD1:157"), IOStandard("LVCMOS15")),
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# HDMI.
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("hdmi", 0,
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Subsignal("clk_p", Pins("CARD1:132")),
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Subsignal("clk_n", Pins("CARD1:130")),
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Subsignal("data0_p", Pins("CARD1:50")), # Inverted.
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Subsignal("data0_n", Pins("CARD1:52")),
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Subsignal("data1_p", Pins("CARD1:62")), # Inverted.
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Subsignal("data1_n", Pins("CARD1:64")),
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Subsignal("data2_p", Pins("CARD1:68")), # Inverted.
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Subsignal("data2_n", Pins("CARD1:70")),
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Subsignal("hdp", Pins("CARD1:154"), IOStandard("LVCMOS18")),
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Subsignal("cec", Pins("CARD1:152"), IOStandard("LVCMOS18")),
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Subsignal("sda", Pins("CARD1:95"), IOStandard("LVCMOS18")),
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Subsignal("scl", Pins("CARD1:97"), IOStandard("LVCMOS18")),
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Misc("PULL_MODE=NONE"),
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),
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# LCD.
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("lcd", 0,
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# Control.
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Subsignal("rst", Pins("CARD1:123")),
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Subsignal("bl", Pins("CARD1:186")),
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Subsignal("sda", Pins("CARD1: 95")),
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Subsignal("scl", Pins("CARD1: 97")),
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Subsignal("int", Pins("CARD1:125")),
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# Video.
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Subsignal("clk", Pins("CARD1:183")),
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Subsignal("de", Pins("CARD1:101")),
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Subsignal("hsync", Pins("CARD1:107")),
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Subsignal("vsync", Pins("CARD1:103")),
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Subsignal("r", Pins("CARD1:193 CARD1:191 CARD1:181 CARD1:177 CARD1:175")),
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Subsignal("g", Pins("CARD1:180 CARD1:131 CARD1:129 CARD1:194 CARD1:192 CARD1:182")),
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Subsignal("b", Pins("CARD1:121 CARD1:119 CARD1:115 CARD1:113 CARD1:109")),
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IOStandard("LVCMOS18")
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),
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# RMII Ethernet
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("eth_clocks", 0,
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Subsignal("ref_clk", Pins("CARD1:148")),
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IOStandard("LVCMOS33"),
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),
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("eth", 0,
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Subsignal("rst_n", Pins("CARD1:176")),
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Subsignal("rx_data", Pins("CARD1:132 CARD1:146")),
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Subsignal("crs_dv", Pins("CARD1:198")),
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Subsignal("tx_en", Pins("CARD1:130")),
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Subsignal("tx_data", Pins("CARD1:140 CARD1:142")),
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Subsignal("mdc", Pins("CARD1:95")),
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Subsignal("mdio", Pins("CARD1:97")),
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Subsignal("rx_er", Pins("CARD1:200")),
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#Subsignal("int_n", Pins("CARD1:")),
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IOStandard("LVCMOS33")
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),
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]
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# Dock Lite IOs ------------------------------------------------------------------------------------
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_dock_lite_io = [
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# Buttons.
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("btn_n", 0, Pins("CARD1:15"), IOStandard("LVCMOS33")),
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("btn_n", 1, Pins("CARD1:163"), IOStandard("LVCMOS15")),
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# Switches
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("user_sw", 0, Pins("CARD1:159"), IOStandard("LVCMOS15")),
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("user_sw", 1, Pins("CARD1:157"), IOStandard("LVCMOS15")),
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]
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_dock_lite_connectors = [
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# Pmod
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("j2", "F15 D16 C9 L12 E15 E14 A9 J11"),
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("j6", "L8 P7 E10 D11 M6 R7 D10 F10"),
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("j7", "T6 T7 T8 T9 P6 R8 M6 P9"),
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("j8", "R16 P16 N16 L16 P15 N15 N14 L14"),
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("j1", {
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7: "T5",
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9: "T3", 10: "T5",
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13: "E9", 14: "E8",
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15: "T15", 16: "C13",
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17: "T13", 18: "M11",
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19: "B10", 20: "A13",
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21: "H12", 22: "G11",
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23: "H13", 24: "J12",
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25: "K12", 26: "K13",
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27: "L13", 28: "K11",
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29: "R11", 30: "T12",
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31: "P11", 32: "T11",
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33: "G16", 34: "H15",
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35: "H16", 36: "H14",
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37: "K16", 38: "J15",
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39: "K15", 40: "K14",
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}),
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("j3", {
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3: "N6", 4: "N7",
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5: "B11", 6: "A12",
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7: "L9", 8: "N8",
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9: "R9", 10: "N9",
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11: "A6", 12: "A7",
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13: "C6", 14: "B8",
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15: "C10",
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17: "A11", 18: "C11",
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19: "B12", 20: "C12",
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21: "B13", 22: "A14",
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23: "B14", 24: "A15",
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25: "D15", 26: "E15",
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27: "F16", 28: "F14",
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29: "G15", 30: "G14",
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31: "J14", 32: "J16",
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33: "G12", 34: "F13",
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35: "M14", 36: "M15",
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37: "T14", 38: "R13",
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39: "P13", 40: "R12",
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})
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(GowinPlatform):
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default_clk_name = "clk27"
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default_clk_period = 1e9/27e6
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def __init__(self, dock="standard", toolchain="gowin"):
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GowinPlatform.__init__(self, "GW2A-LV18PG256C8/I7", _io, _connectors, toolchain=toolchain, devicename="GW2A-18C")
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self.add_extension(_dock_io if dock == "standard" else _dock_lite_io)
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if dock == "lite":
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self.add_connector(_dock_lite_connectors)
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self.toolchain.options["use_mspi_as_gpio"] = 1
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self.toolchain.options["use_sspi_as_gpio"] = 1
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self.toolchain.options["use_ready_as_gpio"] = 1
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self.toolchain.options["use_done_as_gpio"] = 1
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self.toolchain.options["rw_check_on_ram"] = 1
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def create_programmer(self, kit="openfpgaloader"):
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return OpenFPGALoader(cable="ft2232")
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def do_finalize(self, fragment):
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GowinPlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk27", loose=True), 1e9/27e6)
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