99 lines
3.1 KiB
Python
99 lines
3.1 KiB
Python
#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2022 Alex Petrov <sysman@sysman.net>
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# SPDX-License-Identifier: BSD-2-Clause
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from litex.build.generic_platform import *
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from litex.build.xilinx import XilinxPlatform, VivadoProgrammer
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from litex.build.openocd import OpenOCD
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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# Clk / Rst
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("clk100", 0, Pins("G27"), IOStandard("LVCMOS33")),
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("cpu_reset", 0, Pins("W12"), IOStandard("LVCMOS33")),
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# Leds
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("user_led", 0, Pins("AJ22"), IOStandard("LVCMOS33")), # D3
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("user_led", 1, Pins("AJ21"), IOStandard("LVCMOS33")), # D4
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("user_led", 2, Pins("AK21"), IOStandard("LVCMOS33")), # D5
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("user_led", 3, Pins("AK20"), IOStandard("LVCMOS33")), # D6
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("user_led", 4, Pins("AK19"), IOStandard("LVCMOS33")), # D7
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("user_led", 5, Pins("AJ19"), IOStandard("LVCMOS33")), # D8
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("user_led", 6, Pins("AK18"), IOStandard("LVCMOS33")), # D9
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("user_led", 7, Pins("AJ18"), IOStandard("LVCMOS33")), # D10
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# Buttons
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("user_btn_k3", 0, Pins("AK15"), IOStandard("LVCMOS33")),
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("user_btn_k2", 0, Pins("AK16"), IOStandard("LVCMOS33")),
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# Serial (CH340)
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("serial", 0,
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Subsignal("tx", Pins("AK23")),
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Subsignal("rx", Pins("AJ23")),
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IOStandard("LVCMOS33")
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),
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# SPIFlash (Micron N25Q256A (32MB))
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("spiflash", 0,
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Subsignal("cs_n", Pins("V26"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("R30"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("T30"), IOStandard("LVCMOS33")),
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Subsignal("wp", Pins("R28"), IOStandard("LVCMOS33")),
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Subsignal("hold", Pins("T28"), IOStandard("LVCMOS33"))
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),
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("spiflash4x", 0,
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Subsignal("cs_n", Pins("V26"), IOStandard("LVCMOS33")),
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Subsignal("dq", Pins("R30 T30 R28 T28"), IOStandard("LVCMOS33"))
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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# main board connector, pins as marked
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( "main", {
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# usb- 1 2 usb+ not used U3 usb3320 don't use
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# GND 3 4 GND
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# QSPI_CS 5 6 QSPI_D1
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# QSPI_D0 7 8 QSPI_CLK
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9: "B29",
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# 10: "Program_B" key3 reset button
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11: "A28",
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12: "B27",
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13: "A27",
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14: "A26",
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15: "B25",
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16: "A25",
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17: "B24",
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18: "B23",
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19: "A23",
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20: "B22",
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21: "A22",
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22: "A21",
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23: "B20",
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24: "A20",
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# 25,26,27,28: GND
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# 29,30,31,32: V12
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})
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(XilinxPlatform):
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default_clk_name = "clk100"
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default_clk_period = 1e9/100e6
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def __init__(self, toolchain="vivado"):
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XilinxPlatform.__init__(self, "xc7k420tl-ffg901", _io, toolchain=toolchain)
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def create_programmer(self):
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return OpenOCD("openocd_xc7_ft2232.cfg", "bscan_spi_xc7a420t.bit")
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def do_finalize(self, fragment):
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XilinxPlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
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