Hardware/litex-boards
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litex-boards/litex_boards
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Florent Kermarrec 7fa22a494b arty: Switch SPI Flash rate to 1:2 (DDR) (Possible on Arty since SPI Flash's clk does not require use of STARTUPE2). 
On the Digilent Arty, the SPI Flash's clk is connected to CCLK (that can be driven
through the STARTUPE2) but also to another generic IO that can be use to drive the
clock through DDR primitives.
2021-09-07 15:07:59 +02:00
..
platforms gsd_butterstick: Add SDCard (SPI & SD modes) support. 2021-09-02 14:06:09 +02:00
prog Add intial ButterStick support (with just Clk, Buttons and Leds). 2021-09-01 17:33:54 +02:00
targets arty: Switch SPI Flash rate to 1:2 (DDR) (Possible on Arty since SPI Flash's clk does not require use of STARTUPE2). 2021-09-07 15:07:59 +02:00
tools
__init__.py beaglewire: Rename to quertyembedded_beaglewire. 2021-09-01 09:36:09 +02:00