220 lines
7.8 KiB
Python
220 lines
7.8 KiB
Python
# This file is Copyright (c) 2020 Michael Welling <mwelling@ieee.org>
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# This file is Copyright (c) 2020 Sean Cross <sean@xobs.io>
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# This file is Copyright (c) 2020 Drew Fustini <drew@pdp7.com>
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# This file is Copyright (c) 2020 Florent Kermarrec <florent@enjoy-digital.fr>
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# License: BSD
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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("clk8", 0, Pins("U18"), IOStandard("LVCMOS33")),
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("programn", 0, Pins("R1"), IOStandard("LVCMOS33")),
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("serial", 0,
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Subsignal("rx", Pins("U2"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
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Subsignal("tx", Pins("U1"), IOStandard("LVCMOS33")),
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),
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("led", 0, Pins("E3 D3 C3 C4 C2 B1 B20 B19 A18 K20 K19"), IOStandard("LVCMOS33")), # Anodes
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("led", 1, Pins("P19 L18 K18"), IOStandard("LVCMOS33")), # Cathodes via FET
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("usb", 0,
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Subsignal("d_p", Pins("F3")),
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Subsignal("d_n", Pins("G3")),
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Subsignal("pullup", Pins("E4")),
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Subsignal("vbusdet", Pins("F4")),
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IOStandard("LVCMOS33")
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),
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("keypad", 0,
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Subsignal("left", Pins("G2"), Misc("PULLMODE=UP")),
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Subsignal("right", Pins("F2"), Misc("PULLMODE=UP")),
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Subsignal("up", Pins("F1"), Misc("PULLMODE=UP")),
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Subsignal("down", Pins("C1"), Misc("PULLMODE=UP")),
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Subsignal("start", Pins("E1"), Misc("PULLMODE=UP")),
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Subsignal("select", Pins("D2"), Misc("PULLMODE=UP")),
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Subsignal("a", Pins("D1"), Misc("PULLMODE=UP")),
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Subsignal("b", Pins("E2"), Misc("PULLMODE=UP")),
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),
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("hdmi_out", 0,
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Subsignal("clk_p", Pins("P20"), Inverted(), IOStandard("TMDS_33")),
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Subsignal("clk_n", Pins("R20"), Inverted(), IOStandard("TMDS_33")),
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Subsignal("data0_p", Pins("N19"), IOStandard("TMDS_33")),
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Subsignal("data0_n", Pins("N20"), IOStandard("TMDS_33")),
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Subsignal("data1_p", Pins("L20"), IOStandard("TMDS_33")),
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Subsignal("data1_n", Pins("M20"), IOStandard("TMDS_33")),
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Subsignal("data2_p", Pins("L16"), IOStandard("TMDS_33")),
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Subsignal("data2_n", Pins("L17"), IOStandard("TMDS_33")),
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Subsignal("hpd_notif", Pins("R18"), IOStandard("LVCMOS33")), # Also called HDMI_HEAC_n
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Subsignal("hdmi_heac_p", Pins("T19"), IOStandard("LVCMOS33")),
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Misc("DRIVE=4"),
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),
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("lcd", 0,
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Subsignal("db", Pins(
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"J3 H1 K4 J1 K3 K2 L4 K1",
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"L3 L2 M4 L1 M3 M1 N4 N2",
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"N3 N1")),
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Subsignal("rd", Pins("P2")),
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Subsignal("wr", Pins("P4")),
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Subsignal("rs", Pins("P1")),
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Subsignal("cs", Pins("P3")),
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Subsignal("id", Pins("J4")),
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Subsignal("rst", Pins("H2")),
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Subsignal("fmark", Pins("G1")),
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Subsignal("blen", Pins("P5")),
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IOStandard("LVCMOS33")
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),
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("spiflash", 0, # Clock needs to be accessed through USRMCLK
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Subsignal("cs_n", Pins("R2")),
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Subsignal("mosi", Pins("W2")),
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Subsignal("miso", Pins("V2")),
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Subsignal("wp", Pins("Y2")),
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Subsignal("hold", Pins("W1")),
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IOStandard("LVCMOS33")
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),
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("spiflash4x", 0, # Clock needs to be accessed through USRMCLK
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Subsignal("cs_n", Pins("R2")),
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Subsignal("dq", Pins("W2 V2 Y2 W1")),
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IOStandard("LVCMOS33")
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),
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("spiram4x", 0,
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Subsignal("cs_n", Pins("D20")),
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Subsignal("clk", Pins("E20")),
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Subsignal("dq", Pins("E19 D19 C20 F19"), Misc("PULLMODE=UP")),
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IOStandard("LVCMOS33"), Misc("SLEWRATE=SLOW")
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),
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("spiram4x", 1,
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Subsignal("cs_n", Pins("F20")),
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Subsignal("clk", Pins("J19")),
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Subsignal("dq", Pins("J20 G19 G20 H20"), Misc("PULLMODE=UP")),
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IOStandard("LVCMOS33"), Misc("SLEWRATE=SLOW")
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),
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("sao", 0,
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Subsignal("sda", Pins("B3")),
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Subsignal("scl", Pins("B2")),
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Subsignal("gpio", Pins("A2 A3 B4")),
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Subsignal("drm", Pins("A4")),
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IOStandard("LVCMOS33"),
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),
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("sao", 1,
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Subsignal("sda", Pins("A16")),
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Subsignal("scl", Pins("B17")),
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Subsignal("gpio", Pins("B18 A17 B16")),
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Subsignal("drm", Pins("C17")),
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IOStandard("LVCMOS33"),
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),
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("testpts", 0,
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Subsignal("a1", Pins("A15")),
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Subsignal("a2", Pins("C16")),
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Subsignal("a3", Pins("A14")),
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Subsignal("a4", Pins("D16")),
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Subsignal("b1", Pins("B15")),
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Subsignal("b2", Pins("C15")),
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Subsignal("b3", Pins("A13")),
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Subsignal("b4", Pins("B13")),
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IOStandard("LVCMOS33"),
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),
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("sdram_clock", 0, Pins("D11"), IOStandard("LVCMOS33")),
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("sdram", 0,
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Subsignal("a", Pins("A8 D9 C9 B9 C14 E17 A12 B12 H17 G18 B8 A11 B11")),
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Subsignal("dq", Pins("C5 B5 A5 C6 B10 C10 D10 A9")),
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Subsignal("we_n", Pins("B6")),
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Subsignal("ras_n", Pins("D6")),
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Subsignal("cas_n", Pins("A6")),
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Subsignal("cs_n", Pins("C7")),
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Subsignal("cke", Pins("C11")),
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Subsignal("ba", Pins("A7 C8")),
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Subsignal("dm", Pins("A10")),
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IOStandard("LVCMOS33"), Misc("SLEWRATE=FAST")
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),
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]
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_connectors = [
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("pmod", "A15 C16 A14 D16 B15 C15 A13 B13"),
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("genio", "C5 B5 A5 C6 B6 A6 D6 C7 ", # 0-7
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"A7 C8 B8 A8 D9 C9 B9 A9 ", # 8-15
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"D10 C10 B10 A10 D11 C11 B11 A11", # 16-23
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"G18 H17 B12 A12 E17 C14"), # 24-29
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]
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_pmod_gpio = [
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("pmod_gpio", 0,
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Subsignal("p0", Pins("pmod:0")),
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Subsignal("p1", Pins("pmod:1")),
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Subsignal("p2", Pins("pmod:2")),
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Subsignal("p3", Pins("pmod:3")),
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Subsignal("p4", Pins("pmod:4")),
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Subsignal("p5", Pins("pmod:5")),
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Subsignal("p6", Pins("pmod:6")),
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Subsignal("p7", Pins("pmod:7")),
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IOStandard("LVCMOS33")
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),
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]
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_genio_gpio = [
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("genio_gpio", 0,
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Subsignal("p0", Pins("genio:0")),
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Subsignal("p1", Pins("genio:1")),
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Subsignal("p2", Pins("genio:2")),
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Subsignal("p3", Pins("genio:3")),
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Subsignal("p4", Pins("genio:4")),
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Subsignal("p5", Pins("genio:5")),
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Subsignal("p6", Pins("genio:6")),
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Subsignal("p7", Pins("genio:7")),
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Subsignal("p8", Pins("genio:8")),
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Subsignal("p9", Pins("genio:9")),
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Subsignal("p10", Pins("genio:10")),
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Subsignal("p11", Pins("genio:11")),
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Subsignal("p12", Pins("genio:12")),
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Subsignal("p13", Pins("genio:13")),
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Subsignal("p14", Pins("genio:14")),
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Subsignal("p15", Pins("genio:15")),
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Subsignal("p16", Pins("genio:16")),
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Subsignal("p17", Pins("genio:17")),
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Subsignal("p18", Pins("genio:18")),
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Subsignal("p19", Pins("genio:19")),
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Subsignal("p20", Pins("genio:20")),
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Subsignal("p21", Pins("genio:21")),
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Subsignal("p22", Pins("genio:22")),
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Subsignal("p23", Pins("genio:23")),
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Subsignal("p24", Pins("genio:24")),
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Subsignal("p25", Pins("genio:25")),
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Subsignal("p26", Pins("genio:26")),
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Subsignal("p27", Pins("genio:27")),
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Subsignal("p28", Pins("genio:28")),
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Subsignal("p29", Pins("genio:29")),
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)
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticePlatform):
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default_clk_name = "clk8"
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default_clk_period = 1e9/8e6
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def __init__(self, toolchain="trellis", **kwargs):
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LatticePlatform.__init__(self, "LFE5U-45F-CABGA381", io=_io, connectors=_connectors,
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toolchain=toolchain, **kwargs)
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def create_programmer(self):
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raise ValueError("{} programmer is not supported"
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.format(self.programmer))
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def do_finalize(self, fragment):
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LatticePlatform.do_finalize(self, fragment)
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