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litex-boards/litex_boards
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Karol Gugala 86b9b1b56c antmicro_datacenter: fix clock pin LOC 2022-01-06 17:38:49 +01:00
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platforms antmicro_datacenter: fix clock pin LOC 2022-01-06 17:38:49 +01:00
prog prog/openocd_butterstick: Set _CHIPNAME to ecp5 (for jtag_uart/jtag_bone). 2021-10-27 17:27:07 +02:00
targets digilent_zedboard: +x. 2022-01-06 09:38:19 +01:00
tools general: add SPDX License identifier to header and specify files are part of LiteX-Boards. 2020-08-23 15:00:17 +02:00
__init__.py spartan_edge_accelerator: Add seeedstudio prefix and seeedsstudio to vendors list. 2022-01-06 09:06:27 +01:00