litex-boards/litex_boards/targets
Florent Kermarrec a02855d105 decklink_quad_hdmi_recorder: Increase sys_clk to 200MHz. 2021-07-02 15:07:13 +02:00
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1bitsquared_icebreaker.py icebreaker/fomu: Update flashing and disconnect reset from SoC (will need proper support in iCE40PLL). 2021-05-20 09:14:54 +02:00
1bitsquared_icebreaker_bitsy.py targets: Add new 1bitsquared_icebreaker_bitsy target 2021-06-21 22:11:53 +02:00
__init__.py Move import Compat directly to litex_boards.__init__.py and simplify. 2021-03-25 16:47:47 +01:00
antmicro_lpddr4_test_board.py antmicro_lpddr4_test_board: fix ethernet rx delay issue 2021-04-23 15:25:47 +02:00
camlink_4k.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
colorlight_5a_75x.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
colorlight_i5.py targets: Minor cleanup, make sure all targets can be built with default settings. 2021-03-29 16:22:39 +02:00
decklink_intensity_pro_4k.py decklink_intensity_pro_4k: Add WIP. 2021-06-30 09:06:00 +02:00
decklink_mini_4k.py targets/decklink_mini_4k: Fix typos. 2021-06-24 19:13:18 +02:00
decklink_quad_hdmi_recorder.py decklink_quad_hdmi_recorder: Increase sys_clk to 200MHz. 2021-07-02 15:07:13 +02:00
digilent_arty.py targets/digilent_arty: Add default value for CRG's with_mapped_flash. 2021-07-02 09:33:06 +02:00
digilent_arty_s7.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
digilent_basys3.py basys3: Review/Simplify and fix build. 2021-05-25 08:44:26 +02:00
digilent_genesys2.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
digilent_nexys4ddr.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
digilent_nexys_video.py targets/digilent_nexys_video: Add specific Video PLL to give more flexibility on supported Video Timings. 2021-03-30 10:17:50 +02:00
ego1.py Add E-Elements Ego1 initial board support. 2021-04-12 08:20:46 +02:00
enclustra_mercury_kx2.py enclustra_mercury_kx2: Comment user_led2/3 (Conflicting with DRAM pins). 2021-06-16 11:54:52 +02:00
enclustra_mercury_xu5.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
fpc_iii.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
gsd_orangecrab.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
hackaday_hadbadge.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
kosagi_fomu.py icebreaker/fomu: Update flashing and disconnect reset from SoC (will need proper support in iCE40PLL). 2021-05-20 09:14:54 +02:00
kosagi_netv2.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
lambdaconcept_ecpix5.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
lattice_crosslink_nx_evn.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
lattice_crosslink_nx_vip.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
lattice_ecp5_evn.py boards: Add Vendor prefix to platforms/targets name when useful and when multiple boards from the same vendor. (With Retro-Compat on the imports). 2021-03-25 14:11:17 +01:00
lattice_ice40up5k_evn.py Lattice iCE40 UltraPlus Breakout board (iCE40UP5K-B-EVN) added 2021-05-04 12:19:21 +02:00
lattice_versa_ecp5.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
linsn_rv901t.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
logicbone.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
mist.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
muselab_icesugar.py muselab_icesugar/trenz_cyc1000: +x. 2021-05-25 08:46:33 +02:00
numato_aller.py targets: Minor cleanup, make sure all targets can be built with default settings. 2021-03-29 16:22:39 +02:00
numato_mimas_a7.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
numato_nereid.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
numato_tagus.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
pano_logic_g2.py targets: Use new CSR automatic allocation (self.add_csr will still work but is no longer required). 2021-03-25 10:11:24 +01:00
qmtech_ep4ce15.py qmtech ep4ce15: Add daughterboard support, add spiflash 2021-05-15 13:16:43 +07:00
qmtech_wukong.py Qmtech Wukong: updates 2021-04-10 16:26:25 +02:00
qmtech_xc7a35t.py QMTech XC7A35T: fix argument parser description 2021-05-08 08:49:07 +07:00
radiona_ulx3s.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
redpitaya.py targets: Use new CSR automatic allocation (self.add_csr will still work but is no longer required). 2021-03-25 10:11:24 +01:00
saanlima_pipistrello.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
scarabhardware_minispartan6.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
siglent_sds1104xe.py targets: Update names in build descriptions. 2021-04-29 11:56:52 +02:00
simple.py targets: Use new CSR automatic allocation (self.add_csr will still work but is no longer required). 2021-03-25 10:11:24 +01:00
sqrl_acorn.py targets: Update names in build descriptions. 2021-04-29 11:56:52 +02:00
sqrl_fk33.py targets: Minor cleanup, make sure all targets can be built with default settings. 2021-03-29 16:22:39 +02:00
sqrl_xcu1525.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
terasic_de0nano.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
terasic_de1soc.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
terasic_de2_115.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
terasic_de10lite.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
terasic_de10nano.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
terasic_deca.py terasic_deca: Remove --integrated-ram-size parameter (--integrated-main-ram-size provides the same functionnality). 2021-03-27 08:58:49 +01:00
terasic_sockit.py terasic_sockit: fix: make video clock also optional as video terminal is optional 2021-04-27 08:52:11 +07:00
tinyfpga_bx.py targets: Use new CSR automatic allocation (self.add_csr will still work but is no longer required). 2021-03-25 10:11:24 +01:00
trellisboard.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
trenz_c10lprefkit.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
trenz_cyc1000.py muselab_icesugar/trenz_cyc1000: +x. 2021-05-25 08:46:33 +02:00
trenz_max1000.py trenz_max1000: Review/Cleanup. 2021-06-16 18:04:55 +02:00
trenz_te0725.py Add Trenz te0725 initial board support. 2021-04-12 08:16:45 +02:00
trenz_tec0117.py targets/trenz_tec0117: Switch to new GW1NPLL. 2021-04-30 11:32:24 +02:00
xilinx_ac701.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
xilinx_alveo_u250.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
xilinx_alveo_u280.py fix cmdltncy, with_led 2021-04-27 17:30:56 -04:00
xilinx_kc705.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
xilinx_kcu105.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
xilinx_vc707.py targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM). 2021-03-29 16:03:19 +02:00
xilinx_vcu118.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
xilinx_zcu104.py targets/add_sdram: Simplify call by removing useless arguments. 2021-03-29 15:28:31 +02:00
xilinx_zybo_z7.py boards: Add Vendor prefix to platforms/targets name when useful and when multiple boards from the same vendor. (With Retro-Compat on the imports). 2021-03-25 14:11:17 +01:00
ztex213.py targets: Minor cleanup, make sure all targets can be built with default settings. 2021-03-29 16:22:39 +02:00